MPC8536DS Freescale Semiconductor, MPC8536DS Datasheet - Page 1562

BOARD DEV SYSTEM MPC8536E

MPC8536DS

Manufacturer Part Number
MPC8536DS
Description
BOARD DEV SYSTEM MPC8536E
Manufacturer
Freescale Semiconductor
Series
PowerQUICC III™r
Type
MPUr
Datasheets

Specifications of MPC8536DS

Contents
Board, Software and Documentation
Processor Series
MPC85xx
Core
e500
Data Bus Width
32 bit
Maximum Clock Frequency
667 MHz
Operating Supply Voltage
- 0.3 V to + 1.21 V
Maximum Operating Temperature
+ 105 C
Data Ram Size
32 KB
Interface Type
SPI, USB
Program Memory Type
DDR2, DDR3, SDRAM
Core Size
32 Bit
Program Memory Size
544KB
Cpu Speed
1.5GHz
Digital Ic Case Style
BGA
No. Of Pins
783
Supply Voltage Range
0.95V To 1.05V
Rohs Compliant
Yes
For Use With/related Products
MPC8536
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Device Performance Monitor
Figure 24-5
Table 24-5
24-8
12–13 TRIGONCNTL Trigger-on control. Indicates the condition under which triggering to start counting occurs
14–15 TRIGOFFCNTL Trigger-off control. Indicates the condition under which triggering to stop occurs
16–31
8–11
Offset 0xE_1014
Bits
Reset
0–1
2–5
6–7
W
R
0
TRIGOFFSEL Trigger-off select. The number of the counter that stops event counting. When the specified counter’s
TRIGONSEL
1
Name
describes PMLCB0 fields.
shows the performance monitor local control B0 register (PMLCB0).
TRIGONSEL — TRIGOFFSEL TRIGONCNTL TRIGOFFCNTL
2
Figure 24-5. Performance Monitor Local Control Register B0 (PMLCB0)
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
Reserved
Trigger-on select. The number of the counter that starts event counting. When the specified counter’s
TRIGONCNTL event overflows, the current counter begins counting. No triggering occurs if the value
is self-referential, that is, when set to the current counter number.
Reserved
TRIGONCNTL event overflows, the current counter stops counting. No triggering occurs if the value is
self-referential, that is, when set to the current counter number.
00 Trigger off (no triggering to start)
01 Trigger on change
10 Trigger on overflow
11 Reserved
00 Trigger off (no triggering to stop)
01 Trigger on change
10 Trigger on overflow
11 Reserved
Reserved
5
6 7 8
Table 24-5. PMLCB0 Field Descriptions
11
12
13
All zeros
Description
14
15
16
Freescale Semiconductor
Access: Read/Write
31

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