MPC8536DS Freescale Semiconductor, MPC8536DS Datasheet - Page 65

• Manufacturer Part Number: MPC8536DS
• Description: BOARD DEV SYSTEM MPC8536E
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC III™r
• Type: MPUr

Specifications of MPC8536DS

• Contents: Board, Software and Documentation
• Processor Series: MPC85xx
• Core: e500
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 667 MHz
• Operating Supply Voltage: - 0.3 V to + 1.21 V
• Maximum Operating Temperature: + 105 C
• Data Ram Size: 32 KB
• Interface Type: SPI, USB
• Program Memory Type: DDR2, DDR3, SDRAM
• Core Size: 32 Bit
• Program Memory Size: 544KB
• Cpu Speed: 1.5GHz
• Digital Ic Case Style: BGA
• No. Of Pins: 783
• Supply Voltage Range: 0.95V To 1.05V
• Rohs Compliant: Yes
• For Use With/related Products: MPC8536
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

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Freescale Semiconductor
Interface to ZBT SRAM ................................................................................................... 13-105
eTSEC Block Diagram.......................................................................................................... 14-2
TSEC_ID Register .............................................................................................................. 14-26
TSEC_ID2 Register ............................................................................................................ 14-27
IEVENT Register Definition .............................................................................................. 14-28
IMASK Register Definition ................................................................................................ 14-32
EDIS Register Definition .................................................................................................... 14-33
ECNTRL Register Definition ............................................................................................. 14-35
PTV Register Definition...................................................................................................... 14-38
DMACTRL Register........................................................................................................... 14-38
TBIPA Register Definition.................................................................................................. 14-40
TCTRL Register Definition ................................................................................................ 14-40
TSTAT Register Definition ................................................................................................. 14-42
DFVLAN Register Definition............................................................................................. 14-46
TXIC Register Definition.................................................................................................... 14-47
TQUEUE Register Definition ............................................................................................. 14-48
TR03WT Register Definition.............................................................................................. 14-49
TR47WT Register Definition.............................................................................................. 14-49
TBDBPH Register Definition ............................................................................................. 14-50
TBPTR0–TBPTR7 Register Definition .............................................................................. 14-51
TBASEH Register Definition ............................................................................................. 14-51
TBASE Register Definition ................................................................................................ 14-52
TMR_TXTSn_ID Register Definition ................................................................................ 14-52
TMR_TXTSn_H/L Register Definition.............................................................................. 14-53
RCTRL Register Definition ................................................................................................ 14-54
RSTAT Register Definition ................................................................................................. 14-57
RXIC Register Definition ................................................................................................... 14-59
RQUEUE Register Definition............................................................................................. 14-60
RBIFX Register Definition ................................................................................................. 14-62
Receive Queue Filer Table Address Register Definition .................................................... 14-63
Receive Queue Filer Table Control Register Definition ..................................................... 14-64
Receive Queue Filer Table Property IDs 0, 2–15 Register Definition................................ 14-65
Receive Queue Filer Table Property ID1 Register Definition ............................................ 14-65
MRBLR Register Definition ............................................................................................... 14-68
RBDBPH Register Definition............................................................................................. 14-69
RBPTR0–RBPTR7 Register Definition .............................................................................. 14-69
RBASEH Register Definition ............................................................................................. 14-70
RBASE Register Definition ................................................................................................ 14-70
TMR_RXTS_H/L Register Definition................................................................................ 14-71
MACCFG1 Register Definition .......................................................................................... 14-74
MACCFG2 Register Definition .......................................................................................... 14-76
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
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