MPC8536DS Freescale Semiconductor, MPC8536DS Datasheet - Page 20

• Manufacturer Part Number: MPC8536DS
• Description: BOARD DEV SYSTEM MPC8536E
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC III™r
• Type: MPUr

Specifications of MPC8536DS

• Contents: Board, Software and Documentation
• Processor Series: MPC85xx
• Core: e500
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 667 MHz
• Operating Supply Voltage: - 0.3 V to + 1.21 V
• Maximum Operating Temperature: + 105 C
• Data Ram Size: 32 KB
• Interface Type: SPI, USB
• Program Memory Type: DDR2, DDR3, SDRAM
• Core Size: 32 Bit
• Program Memory Size: 544KB
• Cpu Speed: 1.5GHz
• Digital Ic Case Style: BGA
• No. Of Pins: 783
• Supply Voltage Range: 0.95V To 1.05V
• Rohs Compliant: Yes
• For Use With/related Products: MPC8536
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Paragraph
Number
12.4
12.4.1
12.4.1.1
12.4.1.2
12.4.1.3
12.4.1.4
12.4.2
12.4.3
12.4.4
12.4.4.1
12.4.4.2
12.4.4.3
12.4.5
12.4.5.1
12.4.5.2
12.4.5.3
12.5
13.1
13.1.1
13.1.2
13.1.3
13.1.3.1
13.1.3.2
13.2
13.3
13.3.1
13.3.1.1
13.3.1.2
13.3.1.2.1
13.3.1.2.2
13.3.1.2.3
13.3.1.2.4
13.3.1.3
13.3.1.4
13.3.1.5
13.3.1.6
13.3.1.7
xx
Functional Description................................................................................................. 12-19
DUART Initialization/Application Information .......................................................... 12-23
Introduction.................................................................................................................... 13-1
External Signal Descriptions ......................................................................................... 13-4
Memory Map/Register Definition ................................................................................. 13-9
Serial Interface......................................................................................................... 12-19
Baud-Rate Generator Logic ..................................................................................... 12-20
Local Loopback Mode ............................................................................................. 12-21
Errors ....................................................................................................................... 12-21
FIFO Mode .............................................................................................................. 12-22
Overview.................................................................................................................... 13-2
Features...................................................................................................................... 13-2
Modes of Operation ................................................................................................... 13-3
Register Descriptions............................................................................................... 13-10
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
START Bit ........................................................................................................... 12-20
Data Transfer ....................................................................................................... 12-20
Parity Bit .............................................................................................................. 12-20
STOP Bit.............................................................................................................. 12-20
Framing Error ...................................................................................................... 12-21
Parity Error .......................................................................................................... 12-22
Overrun Error....................................................................................................... 12-22
FIFO Interrupts .................................................................................................... 12-22
DMA Mode Select ............................................................................................... 12-22
Interrupt Control Logic........................................................................................ 12-23
eLBC Bus Clock and Clock Ratios ....................................................................... 13-4
Source ID Debug Mode ......................................................................................... 13-4
Base Registers (BR0–BR7) ................................................................................. 13-11
Option Registers (OR0–OR7).............................................................................. 13-12
UPM Memory Address Register (MAR)............................................................. 13-20
UPM Mode Registers (MxMR) ........................................................................... 13-21
Memory Refresh Timer Prescaler Register (MRTPR) ........................................ 13-23
UPM/FCM Data Register (MDR) ....................................................................... 13-23
Special Operation Initiation Register (LSOR)..................................................... 13-24
Address Mask .................................................................................................. 13-13
Option Registers (ORn)—GPCM Mode ......................................................... 13-14
Option Registers (ORn)—FCM Mode ............................................................ 13-16
Option Registers (ORn)—UPM Mode ............................................................ 13-19
Enhanced Local Bus Controller
Contents
Chapter 13
Title
Freescale Semiconductor
Number
Page