MPC8536DS Freescale Semiconductor, MPC8536DS Datasheet - Page 1454

• Manufacturer Part Number: MPC8536DS
• Description: BOARD DEV SYSTEM MPC8536E
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC III™r
• Type: MPUr

Specifications of MPC8536DS

• Contents: Board, Software and Documentation
• Processor Series: MPC85xx
• Core: e500
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 667 MHz
• Operating Supply Voltage: - 0.3 V to + 1.21 V
• Maximum Operating Temperature: + 105 C
• Data Ram Size: 32 KB
• Interface Type: SPI, USB
• Program Memory Type: DDR2, DDR3, SDRAM
• Core Size: 32 Bit
• Program Memory Size: 544KB
• Cpu Speed: 1.5GHz
• Digital Ic Case Style: BGA
• No. Of Pins: 783
• Supply Voltage Range: 0.95V To 1.05V
• Rohs Compliant: Yes
• For Use With/related Products: MPC8536
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Universal Serial Bus Interfaces
21.7.2
The dTD describes to the device controller the location and quantity of data to be sent/received for given
transfer. The DCD should not attempt to modify any field in an active dTD except the Next Link Pointer,
which should only be modified as described in section Managing Transfers with Transfer Descriptors.
21-120
DWord
1
31–5
31
Bits
0
4–1
Device controller read/write; all others read-only.
1
2
0
30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Next transfer element pointer. This field contains the physical memory address of the next dTD to be processed. The
field corresponds to memory address signals [31:5], respectively.
Reserved, should be cleared. Bits reserved for future use and should be cleared.
Terminate (T). 1=pointer is invalid. 0=Pointer is valid (points to a valid Transfer Element Descriptor). This bit indicates
to the Device Controller that there are no more valid entries in the queue.
31–0
31–0
Bits
Endpoint Transfer Descriptor (dTD)
Setup Buffer 0. This buffer contains bytes 3 to 0 of an incoming setup buffer packet and is written by the device
controller to be read by software.
Setup Buffer 1. This buffer contains bytes 7 to 4 of an incoming setup buffer packet and is written by the device
controller to be read by software.
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
Total Bytes
Buffer Pointer (Page 0)
Buffer Pointer (Page 1)
Buffer Pointer (Page 2)
Buffer Pointer (Page 3)
Buffer Pointer (Page 4)
Figure 21-61. Endpoint Transfer Descriptor (dTD)
1
Next Link Pointer
Table 21-76. Multiple Mode Control
Table 21-77. Next dTD Pointer
ioc
15
Description
14 13 12 11 10
Description
000
MultO
0
9
00
8
0000_0000_0000
0000_0000_0000
0000_0000_0000
Current Offset
Frame Number
7
6
5
Status
Freescale Semiconductor
4
1
0000
3
1
1
2
1
T 0x00
0
0x0C
0x04
0x08
0x10
0x14
0x18
offset