MPC8536DS Freescale Semiconductor, MPC8536DS Datasheet - Page 578

• Manufacturer Part Number: MPC8536DS
• Description: BOARD DEV SYSTEM MPC8536E
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC III™r
• Type: MPUr

Specifications of MPC8536DS

• Contents: Board, Software and Documentation
• Processor Series: MPC85xx
• Core: e500
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 667 MHz
• Operating Supply Voltage: - 0.3 V to + 1.21 V
• Maximum Operating Temperature: + 105 C
• Data Ram Size: 32 KB
• Interface Type: SPI, USB
• Program Memory Type: DDR2, DDR3, SDRAM
• Core Size: 32 Bit
• Program Memory Size: 544KB
• Cpu Speed: 1.5GHz
• Digital Ic Case Style: BGA
• No. Of Pins: 783
• Supply Voltage Range: 0.95V To 1.05V
• Rohs Compliant: Yes
• For Use With/related Products: MPC8536
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Security Engine (SEC) 3.0
10.7.7.3
The AB size register
and parameter memory B in bits. An exact size in bits must be provided since a big- to little-endian
re-alignment is performed based on this value. No error checking is performed as to whether the operand
sizes are greater than the prime modulus or the field size written in N-ram. In other words, it is assumed
that operands are modular reduced before being written into the PKEU module. This register must be
written to before each write to parameter memory A or parameter memory B and must be written before
each read of parameter memory A and parameter memory B if the amount of data being taken out is
different than the amount of data put in A or B. The value written to the AB size register must also adhere
to the constraints on parameters A and B, set by the chosen routine (see
10-148
[56-63]
Mode
0x0A
0x0B
0x0C
0x0D
0x0E
0x0F
0xFF
0x06
0x07
0x08
0x09
0x10
0x20
0x30
0x40
0x50
0x60
0x70
0x80
0x1d
0x1e
EC_F2M_PROJ_PTMULT F2m EC: Multiply scalar times point in projective coordinates
EC_F2M_AFF_PTMULT
EC_FP_PROJ_PTMULT
MOD_MULT2_DECONV
F2M_MULT2_DECONV
MOD_MULT1_MONT
F2M_MULT1_MONT
EC_F2M_DOUBLE
RSA_SSTEP_TEQ
EC_FP_DOUBLE
MOD_EXP_TEQ
PKEU AB Size Register
Routine Name
EC_F2M_ADD
EC_FP_ADD
RSA_SSTEP
SPK_BUILD
MOD_ADD
MOD_SUB
F2M_ADD
MOD_INV
F2M_INV
F2M_R2
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
(Figure
Table 10-67. ROUTINE Field Description (continued)
10-96) represents the size of each operand written into parameter memory A
F2m: Invert mod N
FP: Invert mod N
FP: Add mod N
FP: Subtract mod N
F2m: Multiply mod N in Montgomery format
POLY_F2M_MULT1_MONT, and MOD_EXP)
with timing equalization
MOD_R2MODN, EC_F2M_MULT1_MONT, and MOD_EXP_TEQ)
routines)
F2m EC: Multiply scalar times point in affine coordinates
FP EC: Multiply scalar times point in projective coordinates
FP EC: Add two points in projective coordinates
FP EC: Double a point in projective coordinates
F2m EC: Add two points in projective coordinates
F2m EC: Double a point in projective coordinates
F2m: Compute Montgomery converter (R
FP: Multiply mod N in Montgomery format
FP: Multiply mod N and deconvert from Montgomery format
F2m: Add mod N
F2m: Multiply mod N and deconvert from Montgomery format
FP: Exponentiate mod N (combines MOD_R2MODN,
FP: Exponentiate mod N and deconvert from Montgomery format
FP: Exponentiate mod N with timing equalization (combines
Build PK data structure (data structure used by all elliptic curve
Routine Description
2
mod N)
Table
10-67). The AB size register
Freescale Semiconductor
pkeu_ptadd_dbl
pkeu_ptadd_dbl
pkeu_ptadd_dbl
pkeu_ptadd_dbl
Descriptor
pkeu_ptmul
pkeu_ptmul
pkeu_ptmul
pkeu_build
pkeu_mm
pkeu_mm
pkeu_mm
pkeu_mm
pkeu_mm
pkeu_mm
pkeu_mm
pkeu_mm
pkeu_mm
pkeu_mm
pkeu_mm
pkeu_mm
pkeu_mm
Type