MPC8536DS Freescale Semiconductor, MPC8536DS Datasheet - Page 160

• Manufacturer Part Number: MPC8536DS
• Description: BOARD DEV SYSTEM MPC8536E
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC III™r
• Type: MPUr

Specifications of MPC8536DS

• Contents: Board, Software and Documentation
• Processor Series: MPC85xx
• Core: e500
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 667 MHz
• Operating Supply Voltage: - 0.3 V to + 1.21 V
• Maximum Operating Temperature: + 105 C
• Data Ram Size: 32 KB
• Interface Type: SPI, USB
• Program Memory Type: DDR2, DDR3, SDRAM
• Core Size: 32 Bit
• Program Memory Size: 544KB
• Cpu Speed: 1.5GHz
• Digital Ic Case Style: BGA
• No. Of Pins: 783
• Supply Voltage Range: 0.95V To 1.05V
• Rohs Compliant: Yes
• For Use With/related Products: MPC8536
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Signal Descriptions
3-10
LFRB/LUPWAIT/
LGPL0/LFCLE
LGPL1/LFALE
LGPL3/LFWP
LGPL4/LGTA/
LSSD_MODE
LSYNC_OUT
L1_TSTCLK
L2_TSTCLK
LBS0/LFWE
LOE/LFRE
LSYNC_IN
IRQ_OUT
LAD[0:31]
LCLK[0:2]
IIC2_SDA
LA[28:31]
LWE[1:3]/
MA[15:0]
LCS[0:4]
LDP[0:3]
LBS[1:3]
IRQ[0:8]
LGPL2/
LPBSE
LBCTL
LGPL5
IRQ10
IRQ11
LWE0/
Name
LCS5
LCS6
LCS7
IRQ9
LA27
LALE
I
External interrupt 0–8
Interrupt output
External interrupt 10
External interrupt 11
External interrupt 9
L1 test clock
L2 test clock
Local bus port address
Local bus burst address
Local bus address/data
Local bus address latch enable
Local bus data buffer control
Local bus clock
Local bus chip select 0–4
Local bus chip select 5
Local bus chip select 6
Local bus chip select 7
Local bus data parity
Local bus UPM general purpose
line 0
Local bus GP line 1
Local bus GP line 2
/output enable
Local bus GP line 3
Local bus GP line 4/GPCM
terminate access/UPM wait
Local bus GP line 5 address
LSSD mode
Local bus PLL synchronization
Local bus PLL synchronization
Local bus write enable
/byte select 1–3
Local bus write enable
/byte select 0
DDR address
2
C serial data
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
Table 3-2. MPC8536E Alphabetical Signal Reference (continued)
Description
DDR memory
Functional
Block
eLBC
eLBC
eLBC
eLBC
eLBC
eLBC
eLBC
eLBC
eLBC
eLBC
eLBC
eLBC
eLBC
eLBC
eLBC
eLBC
eLBC
eLBC
eLBC
eLBC
eLBC
Test
Test
Test
PIC
PIC
PIC
PIC
PIC
I
2
C
Alternate Function(s)
cfg_gpinput[0:31]
cfg_host_agt[0:2]
cfg_core_speed
DMA_DDONE3
DMA_DDONE2
cfg_sys_pll[0:3]
cfg_sys_speed
cfg_dram_type
cfg_boot_seq0
cfg_boot_seq1
DMA_DREQ2
DMA_DREQ3
DMA_DACK3
cfg_cpu_boot
DMA_DACK2
cfg_core_pll1
cfg_core_pll0
cfg_core_pll2
—
—
—
—
—
—
—
—
—
—
—
—
—
Signals
No. of
32
16
1
9
1
1
1
1
1
1
4
1
1
1
3
5
1
1
1
4
1
1
1
1
1
1
1
1
1
3
1
Freescale Semiconductor
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
11-2/11-4
25-5/25-8
25-5/25-8
13-2/13-5
13-2/13-5
13-2/13-5
13-2/13-5
13-2/13-5
13-2/13-5
13-2/13-5
13-2/13-5
13-2/13-5
13-2/13-5
13-2/13-5
13-2/13-5
13-2/13-5
13-2/13-5
13-2/13-5
13-2/13-5
13-2/13-5
25-5/25-8
13-2/13-5
13-2/13-5
13-2/13-5
13-2/13-5
9-3/9-8
9-3/9-8
9-3/9-8
9-3/9-8
9-3/9-8
8-3/8-6
Table/
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