MPC8536DS Freescale Semiconductor, MPC8536DS Datasheet - Page 1170

• Manufacturer Part Number: MPC8536DS
• Description: BOARD DEV SYSTEM MPC8536E
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC III™r
• Type: MPUr

Specifications of MPC8536DS

• Contents: Board, Software and Documentation
• Processor Series: MPC85xx
• Core: e500
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 667 MHz
• Operating Supply Voltage: - 0.3 V to + 1.21 V
• Maximum Operating Temperature: + 105 C
• Data Ram Size: 32 KB
• Interface Type: SPI, USB
• Program Memory Type: DDR2, DDR3, SDRAM
• Core Size: 32 Bit
• Program Memory Size: 544KB
• Cpu Speed: 1.5GHz
• Digital Ic Case Style: BGA
• No. Of Pins: 783
• Supply Voltage Range: 0.95V To 1.05V
• Rohs Compliant: Yes
• For Use With/related Products: MPC8536
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PCI Express Interface Controller
17.3.9.10 PCI Express Link Capabilities Register—0x58
The PCI Express link capabilities register is shown in
17.3.9.11 PCI Express Link Control Register—0x5C
The PCI Express link control register is shown in
17-74
Offset 0x58
Reset 0 0 0 0 0 0 0 0
Offset 0x5C
Reset
W
R
W
R
31
15
31–24
23–18
17–15
14–12
11–10
15–8
Bits
Bits
9–4
3–0
Port Number
7
6
5
Table 17-85. PCI Express Link Capabilities Register Field Description
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
MAX_LINK_SP
Table 17-86. PCI Express Link Control Register Field Description
MAX_LINK_W
L0s_EX_LAT
Port Number
L1_EX_LAT
EXT_SYNC
24 23
Name
ASPM
Name
—
CCC
RL
—
—
Figure 17-88. PCI Express Link Capabilities Register
0
Figure 17-89. PCI Express Link Control Register
0
0
—
Reserved
L1 exit latency
L0s exit latency
Active state power management (ASPM) Support
Maximum link width
0001 2.5 GT/s link
Reserved
Common clock configuration
Retrain link (Reserved for EP devices). In RC mode, setting this bit
initiates link retraining by directing the Physical Layer LTSSM to the
Recovery state; reads of this bit always return 0.
Maximum link speed
Extended synch
0
8
0
EXT_SYNC
18
0
17
L1_EX_LA
Figure
7
1
All zeros
Figure
1
17-89.
CCC
15
1
6
L0s_EX_LAT ASPM MAX_LINK_W MAX_LINK_SP
17-88.
14
0
Description
Description
RL
1
—
5
12
1
11 10 9
0
LD
4
1 0 0 1 0 0 0 0
RCB
3
Freescale Semiconductor
—
Access: Read only
2
4
3
Access: Mixed
ASPM_CTL
1
0
0
0
1
0