MPC8536DS Freescale Semiconductor, MPC8536DS Datasheet - Page 772

• Manufacturer Part Number: MPC8536DS
• Description: BOARD DEV SYSTEM MPC8536E
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC III™r
• Type: MPUr

Specifications of MPC8536DS

• Contents: Board, Software and Documentation
• Processor Series: MPC85xx
• Core: e500
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 667 MHz
• Operating Supply Voltage: - 0.3 V to + 1.21 V
• Maximum Operating Temperature: + 105 C
• Data Ram Size: 32 KB
• Interface Type: SPI, USB
• Program Memory Type: DDR2, DDR3, SDRAM
• Core Size: 32 Bit
• Program Memory Size: 544KB
• Cpu Speed: 1.5GHz
• Digital Ic Case Style: BGA
• No. Of Pins: 783
• Supply Voltage Range: 0.95V To 1.05V
• Rohs Compliant: Yes
• For Use With/related Products: MPC8536
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Enhanced Three-Speed Ethernet Controllers
14-24
0x2_4C20–
0x2_4BFC ATTRELI*—Attribute extract length and extract index register
0x2_4C0C RQPRM3*—Receive Queue Parameters register 3
0x2_4C1C RQPRM7*—Receive Queue Parameters register 7
0x2_4C4C RFBPTR1*—Last Free RxBD pointer for ring 1
0x2_4C5C RFBPTR3*—Last Free RxBD pointer for ring 3
0x2_4C6C RFBPTR5*—Last Free RxBD pointer for ring 5
0x2_4C7C RFBPTR7*—Last Free RxBD pointer for ring 7
0x2_4CC0
0x2_4BF8 ATTR—Attribute register
0x2_4C00 RQPRM0*—Receive Queue Parameters register 0
0x2_4C04 RQPRM1*—Receive Queue Parameters register 1
0x2_4C08 RQPRM2*—Receive Queue Parameters register 2
0x2_4C10 RQPRM4*—Receive Queue Parameters register 4
0x2_4C14 RQPRM5*—Receive Queue Parameters register 5
0x2_4C18 RQPRM6*—Receive Queue Parameters register 6
0x2_4C40
0x2_4C44 RFBPTR0*—Last Free RxBD pointer for ring 0
0x2_4C48 Reserved
0x2_4C50 Reserved
0x2_4C54 RFBPTR2*—Last Free RxBD pointer for ring 2
0x2_4C58 Reserved
0x2_4C60 Reserved
0x2_4C64 RFBPTR4*—Last Free RxBD pointer for ring 4
0x2_4C68 Reserved
0x2_4C70 Reserved
0x2_4C74 RFBPTR6*—Last Free RxBD pointer for ring 6
0x2_4C78 Reserved
0x2_4D94
0x2_4E00 TMR_CTRL* - Timer control register
0x2_4E04 TMR_TEVENT* - time stamp event register
eTSEC1
Offset
–
Reserved
Reserved
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
Table 14-4. Module Memory Map (continued)
Name
eTSEC Lossless Flow Control Registers
eTSEC Future Expansion Space
1
eTSEC IEEE 1588 Registers
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
w1c
—
—
—
—
—
—
—
—
—
2
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0001_0001
0x0000_0000
Reset
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Freescale Semiconductor
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