MPC8536DS Freescale Semiconductor, MPC8536DS Datasheet - Page 577

BOARD DEV SYSTEM MPC8536E

MPC8536DS

Manufacturer Part Number
MPC8536DS
Description
BOARD DEV SYSTEM MPC8536E
Manufacturer
Freescale Semiconductor
Series
PowerQUICC III™r
Type
MPUr
Datasheets

Specifications of MPC8536DS

Contents
Board, Software and Documentation
Processor Series
MPC85xx
Core
e500
Data Bus Width
32 bit
Maximum Clock Frequency
667 MHz
Operating Supply Voltage
- 0.3 V to + 1.21 V
Maximum Operating Temperature
+ 105 C
Data Ram Size
32 KB
Interface Type
SPI, USB
Program Memory Type
DDR2, DDR3, SDRAM
Core Size
32 Bit
Program Memory Size
544KB
Cpu Speed
1.5GHz
Digital Ic Case Style
BGA
No. Of Pins
783
Supply Voltage Range
0.95V To 1.05V
Rohs Compliant
Yes
For Use With/related Products
MPC8536
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
10.7.7.1
This register specifies the internal PKEU routine to be executed. The mode register is cleared when the
PKEU is reset or re-initialized. Setting a reserved mode bit generates a data error. If the mode register is
modified during processing, a context error is generated.
For channel-controlled access to the PKEU, the descriptor type is determined by the ROUTINE to be used.
The descriptor type used with each ROUTINE is listed in
10.7.7.2
The key size register specifies the number of significant bytes to be used from PKEU Parameter Memory
E in performing modular exponentiation or elliptic curve point multiplication. The range of values for this
register, when performing either modular exponentiation or elliptic curve point multiplication, is from 1 to
512. Specifying a key size outside of this range causes a key size error (KSE) in the PKEU interrupt status
register.
Freescale Semiconductor
Offset 0x3_C000
Reset
[56-63]
Mode
Figure 10-94
ROUTINE field.
0x00
0x01
0x02
0x03
0x04
0x05
W
R
Reset
Field
Addr
R/W
0
EC_FP_AFF_PTMULT
0
CLEARMEMORY
MOD_R2MODN
MOD_RRMODP
PKEU Mode Register
PKEU Key Size Register
Routine Name
RESERVED
shows the PKEU Mode Register, and
MOD_EXP
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
Table 10-67. ROUTINE Field Description
Theorem (R
Reserved
Clear memory
FP: Exponentiate mod N and deconvert from Montgomery format
FP: Compute Montgomery converter (R
FP: Compute Montgomery converter for Chinese Remainder
FP EC: Multiply scalar times point in affine coordinates
Figure 10-95. PKEU Key Size Register
Figure 10-94. PKEU Mode Register
n
R
p
mod N)
PKEU 0x3_C008
Routine Description
All zeros
Table 10-67
R/W
0
Table
10-67.
2
lists the possible values for the
mod N)
51
52
Key Size
Security Engine (SEC) 3.0
Access: Read/Write
55 56
Descriptor
pkeu_ptmul
pkeu_mm
pkeu_mm
pkeu_mm
pkeu_mm
Type
ROUTINE
NA
63
10-147
63

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