MPC8536DS Freescale Semiconductor, MPC8536DS Datasheet - Page 1512

• Manufacturer Part Number: MPC8536DS
• Description: BOARD DEV SYSTEM MPC8536E
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC III™r
• Type: MPUr

Specifications of MPC8536DS

• Contents: Board, Software and Documentation
• Processor Series: MPC85xx
• Core: e500
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 667 MHz
• Operating Supply Voltage: - 0.3 V to + 1.21 V
• Maximum Operating Temperature: + 105 C
• Data Ram Size: 32 KB
• Interface Type: SPI, USB
• Program Memory Type: DDR2, DDR3, SDRAM
• Core Size: 32 Bit
• Program Memory Size: 544KB
• Cpu Speed: 1.5GHz
• Digital Ic Case Style: BGA
• No. Of Pins: 783
• Supply Voltage Range: 0.95V To 1.05V
• Rohs Compliant: Yes
• For Use With/related Products: MPC8536
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Global Utilities
Table 23-14
23-20
10-15
16-17
19-31
Bits
0-9
18
CORE_SPD Requested core clock speed
e500_Ratio
describes PMJCR fields.
Name
—
—
—
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
Reserved
Requested clock ratio between e500 core and CCB clock:
000010 Reserved
000011 3:2
000100 2:1
000101 5:2
000110 3:1
000111 7:2
001000 4:1
001001 Reserved
Default value is the same as PORPLLSR[e500_Ratio].
The value written to this register takes effect when the system wakes from deep sleep or when
a jog mode request is initiated.
Note that if this register has been written by software, but deep sleep has not occurred , then the
value in this register may not necessarily reflect the current clock ratio between the e500 core
and CCB clock.
Reserved
0 Core frequency at or below 800 MHz
1 Core frequency above 800 MHz
Default value is the same as PORDEVSR[CORE_SPD].
The value written to this register takes effect when the system wakes from deep sleep or when
a jog mode request is initiated.
Note that if this register has been written by software, but deep sleep has not occurred , then the
value in this register may not necessarily reflect the current core clock speed. However, this value
must be consistent at all times with the value programmed in PMJCR[e500_Ratio].
Reserved
Table 23-14. PMJCR Field Descriptions
Description
Freescale Semiconductor