MPC8536DS Freescale Semiconductor, MPC8536DS Datasheet - Page 1243

• Manufacturer Part Number: MPC8536DS
• Description: BOARD DEV SYSTEM MPC8536E
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC III™r
• Type: MPUr

Specifications of MPC8536DS

• Contents: Board, Software and Documentation
• Processor Series: MPC85xx
• Core: e500
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 667 MHz
• Operating Supply Voltage: - 0.3 V to + 1.21 V
• Maximum Operating Temperature: + 105 C
• Data Ram Size: 32 KB
• Interface Type: SPI, USB
• Program Memory Type: DDR2, DDR3, SDRAM
• Core Size: 32 Bit
• Program Memory Size: 544KB
• Cpu Speed: 1.5GHz
• Digital Ic Case Style: BGA
• No. Of Pins: 783
• Supply Voltage Range: 0.95V To 1.05V
• Rohs Compliant: Yes
• For Use With/related Products: MPC8536
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

19.3.2.8.1
This HC_ON bit in HControl allows the host software to bring the SATA controller online or offline. The
SATA controller online status should only be changed when there are no commands queued in the SATA
controller or at any attached device.
When the host application wishes to bring the SATA controller offline it clears the HC_ON control bit.
This acts as a request to the SATA controller to go offline. The SATA controller will signal it has completed
this operation by clearing the HS_ON bit in the HStatus register. If any commands are outstanding at SATA
controller or device then the SATA controller will wait for the operation to complete before going offline.
It the host application wishes to bring the SATA controller offline regardless of the queue status, it clears
the HC_ON bit while the HS_OFF bit of the HStatus register is set.
When the host application wishes to bring the SATA controller online, it sets the HC_ON control bit. This
acts as a request to the SATA controller to go online. The SATA controller will signal it has completed this
operation by setting to 1 the HS_ON status bit.
19.3.2.9
When queuing a command into the SATA controller, the CQPMP, shown in
the value of the PMP field that addresses the device to which the command will be issued. If the device is
directly attached (that is, there is no port multiplier in the system), then this register is not required and
should be cleared.
Table 19-10
Freescale Semiconductor
Offset 0x1_8030
Reset
W
R
Bit
31
1
0
describes the CQPMP fields.
Port Number Queue Register (CQPMP)
Bringing the SATA Controller Online/Offline
CC_INT
DE_INT
Name
MPC8536E PowerQUICC III Integrated Processor Reference Manual, Rev. 1
31–4
3–0
Bit
Figure 19-10. Port Number Queue Register (CQPMP)
Table 19-9. HControl Field Descriptions (continued)
Enable interrupt on single device error.
Enable interrupt on command complete.
Table 19-10. CQPMP Field Descriptions
CQPMP
Name
—
Reserved
Command queue port multiplier field
—
All zeros
Description
Description
Figure
19-10, is written with
Access: Read/Write
4
SATA Controller
3
CQPMP
19-13
0