MC68F375BGMZP33 Freescale Semiconductor, MC68F375BGMZP33 Datasheet - Page 76

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MC68F375BGMZP33

Manufacturer Part Number
MC68F375BGMZP33
Description
IC MPU 32BIT 33MHZ 217-PBGA
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC68F375BGMZP33

Processor Type
M683xx 32-Bit
Speed
33MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
217-PBGA
Processor Series
M683xx
Core
CPU32
Data Bus Width
32 bit
Program Memory Type
Flash
Program Memory Size
256 KB
Data Ram Size
10 KB
Interface Type
SPI, SCI, CAN
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
48
Number Of Timers
16
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-
Lead Free Status / Rohs Status
No

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68F375BGMZP33
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
3.10.6 BDM Commands
MC68F375
REFERENCE MANUAL
The CPU writes a unique value indicating the source of BDM transition into temporary
register A (ATEMP) as part of the process of entering BDM. A user can poll ATEMP
and determine the source (refer to
mand (RSREG). ATEMP is used in most debugger commands for temporary storage.
It is imperative that the RSREG command be the first command issued after transition
into BDM.
A double bus fault during initial stack pointer/program counter (SP/PC) fetch sequence
is distinguished by a value of 0xFFFFFFFF in the current instruction PC. At no other
time will the processor write an odd value into this register.
BDM commands consist of one 16-bit operation word and can include one or more 16-
bit extension words. Each incoming word is read as it is assembled by the serial inter-
face. The microcode routine corresponding to a command is executed as soon as the
command is complete. Result operands are loaded into the output shift register to be
shifted out as the next command is read. This process is repeated for each command
until the CPU returns to normal operating mode.
ground mode commands.
NOTES:
Hardware Breakpoint
1. Special status word (SSW) is described in detail in the
BGND Instruction
Double Bus Fault
Manual
Source
Table 3-5 Polling the BDM Entry Source
Freescale Semiconductor, Inc.
(CPU32RM/AD).
For More Information On This Product,
CENTRAL PROCESSOR UNIT
Go to: www.freescale.com
Rev. 25 June 03
Table
ATEMP[31:16]
0x0000
0x0000
SSW
3-5) by issuing a read system register com-
1
Table 3-6
ATEMP[15:0]
CPU32 Reference
0xFFFF
0x0001
0x0000
is a summary of back-
MOTOROLA
3-22

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