MC68F375BGMZP33 Freescale Semiconductor, MC68F375BGMZP33 Datasheet - Page 460

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MC68F375BGMZP33

Manufacturer Part Number
MC68F375BGMZP33
Description
IC MPU 32BIT 33MHZ 217-PBGA
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC68F375BGMZP33

Processor Type
M683xx 32-Bit
Speed
33MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
217-PBGA
Processor Series
M683xx
Core
CPU32
Data Bus Width
32 bit
Program Memory Type
Flash
Program Memory Size
256 KB
Data Ram Size
10 KB
Interface Type
SPI, SCI, CAN
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
48
Number Of Timers
16
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-
Lead Free Status / Rohs Status
No

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
MC68F375BGMZP33
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
13.5.3 DASM interrupts
13.5.4 Freeze Action on the DASM
MC68F375
REFERENCE MANUAL
When using 16 bits of resolution on the comparator (MODE[2:0] = 000), the output can
vary from a 0% duty cycle up to a duty cycle of 65535/65536. In this case it is not pos-
sible to have a 100% duty cycle. In cases where 16-bit resolution is not needed, it is
possible to have a duty cycle ranging from 0% to 100%. Setting bit 15 of the value
stored in register B to ‘1’ results in the output being ‘always set’. Clearing bit 15 (to ‘0’)
allows normal comparisons to occur and the normal output waveform is obtained.
Changes to and from the 100% duty cycle are done synchronously, as are all other
width changes.
In the OPWM mode, the WOR bit selects whether the output is totem pole driven or
open-drain.
When the FLAG bit is set, an interrupt request is generated on one of eight levels as
defined by the interrupt level bits (IL[2:0]) in the DASMSIC register. If the interrupt level
is set to zero, interrupts are disabled.
When the IMB FREEZE signal is recognized, the DASM capture and compare func-
tions are halted. As soon as the FREEZE signal is negated, DASM actions resume as
if nothing had happened. During freeze, the IN bit of the DASMSIC register is readable
NOTES:
Frequencies/Resolutions at f
N
Table 13-9 DASM PWM Example Output
Freescale Semiconductor, Inc.
1. This table is valid only if the DASM is connected to a free-
CPSM
512
512
512
512
512
512
512
512
2
2
2
2
2
2
2
2
running counter.
For More Information On This Product,
CONFIGURABLE TIMER MODULE (CTM9)
Go to: www.freescale.com
N
65536
65536
32768
32768
16384
16384
8192
8192
4096
4096
2048
2048
DASM
512
512
128
128
Rev. 25 June 03
1
frequency (Hz)
PWM output
15625.00
62500.00
1953.13
3906.25
122.07
244.14
488.28
976.56
244.14
15.26
31.04
0.48
0.95
1.91
3.81
7.63
SYS
= 16 MHz
Resolution
(bits)
16
16
15
15
14
14
13
13
12
12
11
11
9
9
7
7
MOTOROLA
13-34

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