MC68F375BGMZP33 Freescale Semiconductor, MC68F375BGMZP33 Datasheet - Page 420

• Manufacturer Part Number: MC68F375BGMZP33
• Description: IC MPU 32BIT 33MHZ 217-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68F375BGMZP33

• Processor Type: M683xx 32-Bit
• Speed: 33MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 217-PBGA
• Processor Series: M683xx
• Core: CPU32
• Data Bus Width: 32 bit
• Program Memory Type: Flash
• Program Memory Size: 256 KB
• Data Ram Size: 10 KB
• Interface Type: SPI, SCI, CAN
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 48
• Number Of Timers: 16
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Lead Free Status / Rohs Status: No

SIGLO — ROM Signature Low Register
12.4.3 ROM Signature High (SIGHI)
SIGHI — ROM Signature High Register
12.4.4 ROM Signature Low (SIGLO)
MC68F375
REFERENCE MANUAL
RSP15 RSP14 RSP13 RSP12 RSP11 RSP10 RSP9 RSP8 RSP7 RSP6 RSP5 RSP4 RSP3 RSP2 RSP1 RSP0
MSB
Bit(s)
MSB
Bit(s)
31:24
23:16
15:12
NOTES:
NOTES:
11:0
15:3
15
15
U
2:0
0
RESET:
1
RESET:
1. The default state of these bits is defined by customer specified options.
2. The default state of these bits is defined by customer specified options.
1. The default state of these bits is defined by customer specified options.
14
0
RSP[18:16
14
U
ROMBAH
ROMBAL
1
Name
Name
—
—
—
]
13
0
U
13
1
Reserved
The 32-bit base address of the ROM array memory address block is contained in the ROMBAH
and ROMBAL array base address registers. The base address register (BAR) is formed by con-
catenating the contents of ROMBAH and ROMBAL. ROMBAH contains the high order 16 bits of
the address (A[31:16]) and ROMBAL contains the next lower order bits. The value of ROMBAH
and ROMBAL are forced to the user defined value programmed in ROM shadow registers on
master RESET. ROMBAH and ROMBAL can be written to relocate the ROM array to an alter-
nate block of memory only when the LOCK bit is 0 and the ROM module is in STOP mode..
Reserved
Reserved
ROM signature pattern. These 3 bits, when concatenated with the 16 bits contained in SIGLO,
form a 19-bit unique signature used to verify the contents of the ROM array. This information is
programmed along with the contents of the array, on the same mask layer.
Table 12-3 BAR (ROMBAH, ROMBAL) Bit Settings
12
0
U
12
1
Freescale Semiconductor, Inc.
11
0
For More Information On This Product,
11
U
1
Table 12-4 SIGHI Bit Settings
10
0
RESERVED
10
U
1
Go to: www.freescale.com
MASK ROM MODULE
9
0
Rev. 25 June 03
U
9
1
8
0
U
8
1
7
0
U
Description
Description
7
1
6
0
U
6
1
5
0
U
5
1
4
0
U
4
1
3
0
U
3
1
RSP1
U
2
8
U
1
2
0xYF F82A
1
0xYF F828
MOTOROLA
RSP1
U
1
7
U
1
1
1
RSP1
LSB
LSB
12-6
U
U
0
6
0
1
1