MC68F375BGMZP33 Freescale Semiconductor, MC68F375BGMZP33 Datasheet - Page 464

• Manufacturer Part Number: MC68F375BGMZP33
• Description: IC MPU 32BIT 33MHZ 217-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68F375BGMZP33

• Processor Type: M683xx 32-Bit
• Speed: 33MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 217-PBGA
• Processor Series: M683xx
• Core: CPU32
• Data Bus Width: 32 bit
• Program Memory Type: Flash
• Program Memory Size: 256 KB
• Data Ram Size: 10 KB
• Interface Type: SPI, SCI, CAN
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 48
• Number Of Timers: 16
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Lead Free Status / Rohs Status: No

13.5.5.3 DASMB — DASM Data Register B
DASM3B — DASM Data Register B
DASM4B
DASM9B
DASM10B
13.6 Pulse Width Modulation Submodule (PWMSM)
MC68F375
REFERENCE MANUAL
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RESET:
DASMB is the data register associated with channel B; its use varies with the different
modes of operation. Depending on the mode selected, software access is to register
B1 or register B2.
In the DIS mode, DASMB can be accessed to prepare a value for a subsequent mode
selection. In this mode, register B1 is accessed in order to prepare a value for the
OPWM mode. Unused register B2 is hidden and cannot be read, but is written with the
same value when register B1 is written.
In the IPWM mode, DASMB contains the captured value corresponding to the leading
edge of the measured pulse. In this mode, register B2 is accessed; buffer register B1
is hidden and cannot be accessed.
In the IPM and IC modes, DASMB contains the captured value corresponding to the
most recently detected period edge (rising or falling edge). In this mode, register B2 is
accessed; buffer register B1 is hidden and cannot be accessed.
In the OCB and OCAB modes, DASMB is loaded with the value corresponding to the
trailing edge of the pulse to be generated. Writing to DASMB in the OCB and OCAB
modes also enables the corresponding channel B comparator until the next successful
comparison. In this mode, register B2 is accessed; buffer register B1 is hidden and
cannot be accessed.
In the OPWM mode, DASMB is loaded with the value corresponding to the trailing
edge of the PWM pulse to be generated. In this mode, register B1 is accessed; buffer
register B2 is hidden and cannot be accessed.
The purpose of the pulse width modulation submodule (PWMSM) is to create a vari-
able pulse width output signal at a wide range of frequencies, independent of other
CTM9 output signals. The PWMSM includes its own counter, and thus does not use
the CTM9 time-base buses. The PWMSM pulse width can vary from 0.0 percent to
100.0 percent, with up to 16 bits of resolution. The finest output resolution is the MCU
system clock time divided by two (for a system clock of 16.78 MHz, the finest output
pulse width resolution is 119 nanoseconds). With the full 16 bits of resolution and the
first stage prescaler divide-by-2 clock selection, the period of the PWM output can
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Freescale Semiconductor, Inc.
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For More Information On This Product,
CONFIGURABLE TIMER MODULE (CTM9)
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Go to: www.freescale.com
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Rev. 25 June 03
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0xYF F21C
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