MC68F375BGMZP33 Freescale Semiconductor, MC68F375BGMZP33 Datasheet - Page 612

• Manufacturer Part Number: MC68F375BGMZP33
• Description: IC MPU 32BIT 33MHZ 217-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68F375BGMZP33

• Processor Type: M683xx 32-Bit
• Speed: 33MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 217-PBGA
• Processor Series: M683xx
• Core: CPU32
• Data Bus Width: 32 bit
• Program Memory Type: Flash
• Program Memory Size: 256 KB
• Data Ram Size: 10 KB
• Interface Type: SPI, SCI, CAN
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 48
• Number Of Timers: 16
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Lead Free Status / Rohs Status: No

SGLR 8-18
SHEN 4-3, 4-51
Show cycle
SICA 13-20
SICA — SASM status/interrupt/control register A 13-20
SICB 13-22
SICB — SASM status/interrupt/control register B 13-22
SIGHI
SIGHI — ROM signature high register 12-6
SIGLO
SIGLO — ROM signature low register 12-6
Single
SIZ 4-34, 4-37, 4-51, 4-52
Size signals (SIZ) 4-34
Slave Select (SS) 6-41
Slave select signal (SS) 6-37, 6-38
SLIMP 4-23
SOF 7-9
Soft reset control field (SOFT_RST) 8-19
SOFT_RST 8-19
SOFTRST 7-11
Software
Software watchdog
SPACE (address space select) 4-82
SPBR 6-17
SPCR0 6-16
SPCR1 6-18
SPCR2 6-18
SPCR3 6-19
SPE 6-18, 6-41
SPI 3-25
SPI Test Scan Path Select (TSBD) 6-7
SPIF 6-21
SPIFIE 6-19
SPSR 6-19, 6-41
Spurious interrupt exception 4-71
SPWM D-39
MC68F375
REFERENCE MANUAL
enable (SHEN) 4-3, 4-5, 4-51
operation 4-51
timing diagram E-15
SIGHI — ROM signature high register 12-6
SIGLO — ROM signature low register 12-6
-chip
encoding 4-34
breakpoints 4-43
service register (SWSR) 4-26
watchdog 4-26
enable (SWE) 4-24
prescale (SWP) 4-24
reset (SW) 4-56
timing field (SWT) 4-24
finished interrupt enable (SPIFIE) 6-19
TSBD 6-7
mode 4-64, 4-65
block diagram 4-27
enable (SWE) 4-26
prescale (SWP) 4-26
ratio of SWP and SWT bits 4-27
timeout period calculation 4-27
timing field (SWT) 4-26
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
Rev. 25 June 03
INDEX
SR 3-6
SRAM
SRBK 8-13
SRR 7-6
SS 6-41
SS 6-37, 6-38
SSE1 5-39
SSE2 5-41
SSP 3-10
Stack pointer (SP) 3-1
Standard
Standby RAM module w/ TPU emulation (TPURAM). See
Start
State machine 5-25, 6-54
Status register (QASR) 5-42
STEXT 4-21
STF 8-11
STOP 4-30, 5-35, 7-17, 8-11
Stop
STRB (address strobe/data strobe) bit 4-42, 4-81
STSCIM 4-21
STUFFERR 7-31
Subqueue 5-15
Substitute remote request (SRR) 7-6
Successive approximation register (SAR) 5-14
Supervisor
Supervisor mode
SUPV 4-3, 4-87, 5-8, 5-35, 11-4, 13-21
SW 4-56
SWE 4-24, 4-26
SWP 4-24, 4-26
SWSR 4-26, 4-28
SWT 4-24, 4-26
synchronization of counters 13-5
registers
supervisor space only 6-7
message format 7-1
bit (beginning of data frame) 6-50
-of-frame (SOF) symbol 7-9
clocks to TCRs (CLKS) 8-12
enable (STOP) bit
flag (STF) 8-11
mode
SCI end of data frame bit 6-50
/unrestricted data space (SUPV)
stack pointer (SSP) 3-10
and SRAM 6-7
array base address register (RAMBAH, RAMBAL)
frames 7-5
TPURAM 1-5
QADC 5-6
QSM 6-5
TOUCAN 7-17
TPU 8-11
external clock (STEXT) 4-21
SCIM clock (STSCIM) 4-21
QADC 5-35, 11-4
SCIM2 4-3, 13-21
TPU 8-11
11-5
MOTOROLA
Index-14