MC68F375BGMZP33 Freescale Semiconductor, MC68F375BGMZP33 Datasheet - Page 111

• Manufacturer Part Number: MC68F375BGMZP33
• Description: IC MPU 32BIT 33MHZ 217-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68F375BGMZP33

• Processor Type: M683xx 32-Bit
• Speed: 33MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 217-PBGA
• Processor Series: M683xx
• Core: CPU32
• Data Bus Width: 32 bit
• Program Memory Type: Flash
• Program Memory Size: 256 KB
• Data Ram Size: 10 KB
• Interface Type: SPI, SCI, CAN
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 48
• Number Of Timers: 16
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Lead Free Status / Rohs Status: No

4.4.8 Interrupt Priority and Vectoring for the Periodic Interrupt Timer
MC68F375
REFERENCE MANUAL
The periodic interrupt timer modulus counter is clocked by one of two signals. When
the PLL is enabled, f
reference mode. When the PLL is disabled, f
prescaler (PTP) bit in the periodic interrupt timer register (PITR) determines system
clock prescaling for the periodic interrupt timer. One of two options, either no prescal-
ing, or prescaling by a factor of 512, can be selected. The value of PTP is affected by
the state of the V
software can change PTP value.
Either clock signal selected by PTP is divided by four before driving the modulus
counter. The modulus counter is initialized by writing a value to the periodic interrupt
timer modulus (PITM[7:0]) field in PITR. A zero value turns off the PIT. When the mod-
ulus counter reaches zero, an interrupt is generated. The modulus counter is then
reloaded with the value in PITM[7:0] and counting repeats. If a new value is written to
PITR, it is loaded into the modulus counter when the current count is completed.
The following equation calculates the PIT period in slow reference mode:
The following equation calculates the PIT period in fast reference mode:
The following equation calculates the PIT period in external clock mode:
Interrupt priority and vectoring for the PIT are determined by the values of the periodic
interrupt request level (PIRQL[2:0]) and periodic interrupt vector (PIV[7:0]) fields in the
periodic interrupt control register (PICR).
The PIRQL field is compared to the CPU32 interrupt priority mask to determine
whether the interrupt is recognized.
PIT Period
PIT Period
PIT Period
DDSYN
SINGLE-CHIP INTEGRATION MODULE 2 (SCIM2E)
Freescale Semiconductor, Inc.
ref
For More Information On This Product,
1 (Synthesized Clock)
V
0 (External Clock)
=
/MODCLK pin during reset, as shown in
is used in slow reference mode and f
DDSYN
Table 4-13 PTP Reset States
------------------------------------------------------------------------------------------------------------------------------------
=
=
128 PITM[7:0] 1 if PTP = 0, 512 if PTP = 1 4
-------------------------------------------------------------------------------------------------------------------- -
-------------------------------------------------------------------------------------------------------------------- -
Go to: www.freescale.com
/MODCLK
PITM[7:0] 1 if PTP = 0, 512 if PTP = 1 4
PITM[7:0] 1 if PTP = 0, 512 if PTP = 1 4
Rev. 25 June 03
Table 4-14
ref
is used. The value of the periodic timer
1 ( 512)
0 ( 1)
PTP
f
f
f
shows PIRQL[2:0] priority values.
ref
ref
ref
ref
÷ 128 is used in fast
Table
4-13. System
MOTOROLA
4-29