MC68F375BGMZP33 Freescale Semiconductor, MC68F375BGMZP33 Datasheet - Page 209

• Manufacturer Part Number: MC68F375BGMZP33
• Description: IC MPU 32BIT 33MHZ 217-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68F375BGMZP33

• Processor Type: M683xx 32-Bit
• Speed: 33MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 217-PBGA
• Processor Series: M683xx
• Core: CPU32
• Data Bus Width: 32 bit
• Program Memory Type: Flash
• Program Memory Size: 256 KB
• Data Ram Size: 10 KB
• Interface Type: SPI, SCI, CAN
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 48
• Number Of Timers: 16
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Lead Free Status / Rohs Status: No

5.12 Programming Model
MC68F375
REFERENCE MANUAL
Each QADC64 occupies 1 Kbyte (512 16-bit entries) of address space. The address
space consists of ten 16-bit control, status, and port registers; 64 16-bit entries in the
CCW table; and 64 16-bit entries in the result table. The result table occupies 192 16-
bit address locations because the result data is readable in three data alignment
formats.
Table 5-6
ister name represents “A” or “B” for the QADC64_A or QADC64_B module,
respectively. The address is the base address of the module. Refer to
INTERNAL MEMORY MAP
ory map.
IVB7
IVB7
7
7
Interrupt Register Provided by Software
IVB6
IVB6
Software interrupt vector provided
to CPU during software interrupt
arbitration (from QADC64 module)
6
6
shows the QADC64 memory map. The lowercase “x” appended to each reg-
IVB5
IVB5
5
5
QUEUED ANALOG-TO-DIGITAL CONVERTER MODULE-64
Figure 5-11 QADC64 Interrupt Vector Format
IVB4
IVB4
4
4
Freescale Semiconductor, Inc.
For More Information On This Product,
IVB3
IVB3
3
3
IVB2
IVB2
to locate each QADC64 module in the MC68F375 mem-
2
2
Go to: www.freescale.com
IVB1
IVB1
IVB1
1
1
1
0
0
1
Rev. 25 June 03
IVB0
IVB0
0
1
0
1
0
0
—
—
—
—
Queue 1 completion software interrupt
Queue 1 pause software interrupt
Queue 2 completion software interrupt
Queue 2 pause software interrupt
Vector Bits Provided by QADC64
APPENDIX A
QADC SWI VECT
MOTOROLA
5-33