MC68F375BGMZP33 Freescale Semiconductor, MC68F375BGMZP33 Datasheet - Page 324

• Manufacturer Part Number: MC68F375BGMZP33
• Description: IC MPU 32BIT 33MHZ 217-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68F375BGMZP33

• Processor Type: M683xx 32-Bit
• Speed: 33MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 217-PBGA
• Processor Series: M683xx
• Core: CPU32
• Data Bus Width: 32 bit
• Program Memory Type: Flash
• Program Memory Size: 256 KB
• Data Ram Size: 10 KB
• Interface Type: SPI, SCI, CAN
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 48
• Number Of Timers: 16
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Lead Free Status / Rohs Status: No

7.6.3 Auto-Power Save Mode
MC68F375
REFERENCE MANUAL
Auto power save mode enables normal operation with optimized power savings. Once
the auto power save (APS) bit in CANMCR is set, the TouCAN looks for a set of con-
ditions in which there is no need for the clocks to be running. If these conditions are
met, the TouCAN stops its clocks, thus saving power. The following conditions activate
auto-power save mode.
• When the self-wake mechanism is activated, the TouCAN tries to receive the
• If the STOP bit is set while the TouCAN is in the bus-off state, then the TouCAN
• To place the TouCAN in low-power stop mode with the self-wake mechanism
• To take the TouCAN out of low-power stop mode when the self-wake mechanism
• The SELFWAKE bit should not be set after the TouCAN has already entered low-
• If both STOP and SELFWAKE are set and a recessive to dominant edge
• To prevent old frames from being sent when the TouCAN awakes from low-power
• If the TouCAN is in debug mode when the STOP bit is set, the TouCAN assumes
• Unlike other modules, the TouCAN does not come out of reset in low-power stop
• If the TouCAN is in low-power stop mode with the self-wake mechanism engaged
• No RX/TX frame in progress.
• No transfer of RX/TX frames to and from a serial message buffer, and no TX
frame that woke it up. (It assumes that the dominant bit detected is a start-of-
frame bit.) It will not arbitrate for the CAN bus at this time.
enters low-power stop mode and stops counting recessive bit times. The count
continues when STOP is cleared.
engaged, write to CANMCR with both STOP and SELFWAKE set, and then wait
for the TouCAN to set the STOPACK bit.
is enabled, write to CANMCR with both STOP and SELFWAKE clear, and then
wait for the TouCAN to clear the STOPACK bit.
power stop mode.
immediately occurs on the CAN bus, the TouCAN may never set the STOPACK
bit, and the STOP bit will be cleared.
stop mode via the self-wake mechanism, disable all transmit sources, including
transmit buffers configured for remote request responses, before placing the Tou-
CAN in low-power stop mode.
that debug mode should be exited. As a result, it tries to synchronize with the CAN
bus, and only then does it await the conditions required for entry into low-power
stop mode.
mode. The basic TouCAN initialization procedure should be executed before
placing the module in low-power stop mode. (Refer to
tion.)
and is operating with a single system clock per time quantum, there can be ex-
treme cases in which TouCAN wake-up on recessive to dominant edge may not
conform to the CAN protocol. TouCAN synchronization is shifted one time quan-
tum from the wake-up event. This shift lasts until the next recessive to dominant
edge, which resynchronizes the TouCAN to be in conformance with the CAN pro-
tocol. The same holds true when the TouCAN is in auto-power save mode and
awakens on a recessive to dominant edge.
Freescale Semiconductor, Inc.
For More Information On This Product,
CAN 2.0B CONTROLLER MODULE
Go to: www.freescale.com
Rev. 25 June 03
7.5.2 TouCAN Initializa-
MOTOROLA
7-18