MC68F375BGMZP33 Freescale Semiconductor, MC68F375BGMZP33 Datasheet - Page 444

• Manufacturer Part Number: MC68F375BGMZP33
• Description: IC MPU 32BIT 33MHZ 217-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68F375BGMZP33

• Processor Type: M683xx 32-Bit
• Speed: 33MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 217-PBGA
• Processor Series: M683xx
• Core: CPU32
• Data Bus Width: 32 bit
• Program Memory Type: Flash
• Program Memory Size: 256 KB
• Data Ram Size: 10 KB
• Interface Type: SPI, SCI, CAN
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 48
• Number Of Timers: 16
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Lead Free Status / Rohs Status: No

13.4.1.4 Output Compare and Toggle (OCT) Mode
13.4.1.5 Output Port (OP) mode
MC68F375
REFERENCE MANUAL
the FLAG bit is set to indicate to the processor that a match has occurred. Depending
on the state of the IEN bit, an interrupt can be generated when the FLAG bit is set. The
FLAG bit must be reset by software (see
Bits). If the interrupt is serviced, the FLAG bit should be cleared by the servicing rou-
tine before returning from that routine. If a subsequent output compare occurs while
the FLAG bit is set, the output compare function occurs normally, and the FLAG bit
remains set.
An output compare match can be simulated in software by writing a one to the FORCE
bit. Setting the FORCE bit forces the EDOUT bit value onto the pin as if an output com-
pare had occurred. In this case, the FLAG bit is not affected. Only if a genuine output
compare occurs while doing a force, will the FLAG bit be set to signify that the compare
has occurred.
In OCT mode, the state of an output pin is toggled each time a successful output com-
pare occurs; an interrupt may also be generated. The output compare circuitry
performs a comparison between the 16-bit register and the selected time base bus.
When a match is found, the output flip-flop is toggled to the opposite state. At the same
time, the FLAG bit is set to indicate to the processor that the output compare has
occurred. Depending on the state of the IEN bit, an interrupt can be generated when
the FLAG bit is set. The FLAG bit must be reset by software (see
and Using the FLAG
by the servicing routine before returning from that routine. If a subsequent output com-
pare occurs while the FLAG bit is set, the output toggles, and the FLAG bit remains set.
An output compare match can be simulated in software by writing a one to the FORCE
bit. Setting the FORCE bit forces the output flip flop to toggle as if an output compare
had occurred. In this case, the FLAG bit is not affected. Only if a genuine output com-
pare occurs while doing a force, will the FLAG bit be set to signify that the compare
has occurred.
In OCT mode, the IN bit reflects the logic state on the output of the output flip-flop.
In OP mode the channel’s input/output pin is used as a single output port pin. The out-
put compare function is still available, but for internal operation only, and does not
affect the state of the output pin. An interrupt may also be generated when a compare
occurs. The state of the output pin always reflects the value of the EDOUT bit in the
channel’s SIC register. Reading the EDOUT bit returns the last value written to it.
The internal compare feature compares the 16-bit register with the selected time base
bus. The output compare circuitry performs a comparison between the 16-bit register
and the selected time base bus. When a match is found, the FLAG bit is set to indicate
to the processor that the output compare has occurred. Depending on the state of the
IEN bit, an interrupt can be generated when the FLAG bit is set. The FLAG bit must be
In OC mode, the IN bit value reflects the logic state on the output of the output flip-flop.
Freescale Semiconductor, Inc.
For More Information On This Product,
Bits). If the interrupt is serviced, the FLAG bit should be cleared
CONFIGURABLE TIMER MODULE (CTM9)
Go to: www.freescale.com
Rev. 25 June 03
13.4.1.1 Clearing and Using the FLAG
13.4.1.1 Clearing
MOTOROLA
13-18