MC68F375BGMZP33 Freescale Semiconductor, MC68F375BGMZP33 Datasheet - Page 68

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MC68F375BGMZP33

Manufacturer Part Number
MC68F375BGMZP33
Description
IC MPU 32BIT 33MHZ 217-PBGA
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC68F375BGMZP33

Processor Type
M683xx 32-Bit
Speed
33MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
217-PBGA
Processor Series
M683xx
Core
CPU32
Data Bus Width
32 bit
Program Memory Type
Flash
Program Memory Size
256 KB
Data Ram Size
10 KB
Interface Type
SPI, SCI, CAN
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
48
Number Of Timers
16
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-
Lead Free Status / Rohs Status
No

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68F375BGMZP33
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
MC68F375
REFERENCE MANUAL
TBLSN/TBLUN
NOTES:
TBLS/TBLU
Instruction
TRAPcc
1. Privileged instruction.
TRAPV
STOP
SWAP
SUBQ
SBCD
SUBA
SUBX
TRAP
UNLK
RTE
SUBI
RTR
RTS
SUB
TAS
TST
Scc
1
1
Dym : Dyn,
Dym : Dyn,
(An),
(An),
Operand
<ea>, Dn
Dn, <ea>
<ea>, An
<ea>, Dn
<ea>, Dn
#<data>,
#<data>,
#<data>
#<data>
#<data>
Syntax
Dn, Dn
Dn, Dn
<ea>
<ea>
<ea>
<ea>
<ea>
none
none
none
none
none
Dn
Dn
Dn
An
Table 3-2 Instruction Set Summary (Continued)
(An)
(An)
Freescale Semiconductor, Inc.
For More Information On This Product,
Operand
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
16, 32
16, 32
none
none
none
none
none
none
Size
16
16
32
8
8
8
8
CENTRAL PROCESSOR UNIT
Go to: www.freescale.com
(SP)
SP
Restore stack according to format
(SP)
SP
(SP)
Destination10
If condition true, then destination bits are set to one;
else, destination bits are cleared to zero
Data
Destination
Destination
Destination
Destination
Destination
Destination Tested Condition Codes bit 7 of
Destination
Dyn
(Temp
(Dym 256)
Dyn
(Temp
Dym
SSP
SSP
vector address
If cc true, then TRAP exception
If V set, then overflow TRAP exception
Source
An
Rev. 25 June 03
4
4
SP; (SP)
Dym
Dym
2
4
Temp
SR; SP
CCR; SP
PC; SP
SR; STOP
Dn [7 : 0])
Dn [7 : 0]) / 256
0, to set condition codes
SP;
SP
SSP; format/vector offset
SSP; PC
Source
Source
Data
Data
Source
Temp
Temp
Temp
Source10
Dn
2
4
PC
An, SP
2
Destination
Destination
Temp
SP; (SP)
SP
X
Dn
(SSP); SR
SP; (SP)
Destination
Destination
MSW LSW
Description
Temp
4
X
Destination
SP
Destination
PC;
PC;
(SSP);
(SSP);
MOTOROLA
3-14

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