MC68F375BGMZP33 Freescale Semiconductor, MC68F375BGMZP33 Datasheet - Page 109

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MC68F375BGMZP33

Manufacturer Part Number
MC68F375BGMZP33
Description
IC MPU 32BIT 33MHZ 217-PBGA
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC68F375BGMZP33

Processor Type
M683xx 32-Bit
Speed
33MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
217-PBGA
Processor Series
M683xx
Core
CPU32
Data Bus Width
32 bit
Program Memory Type
Flash
Program Memory Size
256 KB
Data Ram Size
10 KB
Interface Type
SPI, SCI, CAN
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
48
Number Of Timers
16
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-
Lead Free Status / Rohs Status
No

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68F375BGMZP33
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
MC68F375
REFERENCE MANUAL
The following equation calculates the timeout period in slow reference mode:
The following equation calculates the timeout period in fast reference mode:
The following equation calculates the timeout period in external clock mode:
Table 4-12
When SWT[1:0] are modified, a watchdog service sequence must be performed
before the new timeout period can take effect.
Figure 4-8
odic interrupt timer.
Timeout Period
shows the divide ratio for each combination of the SWP and SWT[1:0] bits.
is a block diagram of the watchdog timer and the clock control for the peri-
Timeout Period
Timeout Period
SWP
0
0
0
0
1
1
1
1
Table 4-12 Software Watchdog Divide Ratio
SINGLE-CHIP INTEGRATION MODULE 2 (SCIM2E)
Freescale Semiconductor, Inc.
For More Information On This Product,
=
------------------------------------------------------------------------------------------------------------------------------------------- -
128 Divide Ratio Specified by SWP and SWT[1:0]
=
=
Go to: www.freescale.com
Divide Ratio Specified by SWP and SWT[1:0]
----------------------------------------------------------------------------------------------------------------------- -
Divide Ratio Specified by SWP and SWT[1:0]
----------------------------------------------------------------------------------------------------------------------- -
SWT[1:0]
Rev. 25 June 03
00
01
10
11
00
01
10
11
f
f
f
ref
ref
ref
Divide Ratio
2
2
2
2
2
2
2
2
11
13
15
18
20
22
24
9
MOTOROLA
4-27

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