MC68F375BGMZP33 Freescale Semiconductor, MC68F375BGMZP33 Datasheet - Page 143

• Manufacturer Part Number: MC68F375BGMZP33
• Description: IC MPU 32BIT 33MHZ 217-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68F375BGMZP33

• Processor Type: M683xx 32-Bit
• Speed: 33MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 217-PBGA
• Processor Series: M683xx
• Core: CPU32
• Data Bus Width: 32 bit
• Program Memory Type: Flash
• Program Memory Size: 256 KB
• Data Ram Size: 10 KB
• Interface Type: SPI, SCI, CAN
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 48
• Number Of Timers: 16
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Lead Free Status / Rohs Status: No

MC68F375
REFERENCE MANUAL
A[18:3]
D[15:0]
CSBOOT
D[7:0]
BR/CS0
FC0/CS3/PC0
FC1/PC1
FC2/CS5/PC2
A19/CS6/PC3
A20/CS7/PC4
A21/CS8/PC5
A22/CS9/PC6
A23/CS10/E
DSACK0/PE0
DSACK1/PE1
AVEC/PE2
RMC/PE3
DS/PE4
AS/PE5
SIZ0/PE6
SIZ1/PE7
FASTREF/PF0
IRQ1/PF1
IRQ2/PF2
IRQ3/PF3
IRQ4/PF4
IRQ5/PF5
IRQ6/PF6
IRQ7/PF7
BGACK/CSE
BG/CSM
Pin(s) Affected
In single-chip mode, the default setting of the address bus disable (ABD) bit places
ADDR[2:0] in a high-impedance state to reduce noise emissions. ADDR[2:0] function
—
—
BERR
MODCK
BKPT
D0
D1
D2
D3-D7
D4-D7
D5-D7
D6 D7
D7
D8
D9
D10
D11
D12-15
D10
D11
D12
D13
D14
D15
Select Pin
Table 4-26 Mode Configuration During Reset
Mode
SINGLE-CHIP INTEGRATION MODULE 2 (SCIM2E)
Freescale Semiconductor, Inc.
For More Information On This Product,
Expanded
VCO=
System Clock
BGND Mode
Disabled
16-bit
8-Bit Data Bus
CS0
CS3
FC1
CS5
CS6
CS7
CS8
CS9
CS10
DSACK0
DSACK1
AVEC
RMC
DS
AS
SIZ0
SIZ1
MODCK
IRQ1
IRQ2
IRQ3
IRQ4
IRQ5
IRQ6
IRQ7
BGACK/BG
Emulator mode
disabled
Slave mode
disabled
Not used
CMFI and ROM EMUL enable (high = enabled, low = disabled)
ROM STOP (high = enabled, low = disabled)
CMFI STOP (high = enabled, low = disabled)
Mode Pin High
During RESET
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Effect of
Rev. 25 June 03
Single Chip
EXTAL=
System Clock
BGND Mode
Enabled
8-bit
16-Bit Data Bus
BR
FC0
FC1
FC2
A19
A20
A21
A22
A23
PE0
PE1
PE2
PE3
PE4
PE5
PE6
PE7
PF0
PF1
PF2
PF3
PF4
PF5
PF6
PF7
CSE/CSM
Emulator mode
enabled
Slave mode
enabled
During RESET
Mode Pin Low
Effect of
Decode MODCK Decode MODCK
Decode BKPT
8-bit
D[7:0] = Port H
CS0
CS3
FC1
CS5
CS6
CS7
CS8
CS9
CS10
BGACK/BG
Emulator mode
disabled
Slave mode
disabled
— (Decode D8)
— (Decode D9)
8-Bit Data Bus
Default for
Mode 11
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
A[18:3] = PortA, B
D[15:0] = Port G, H
Decode BKPT
8-bit
Ignored
CS0
PC0
PC1
PC2
PC3
PC4
PC5
PC6
CS10
PE0
PE1
PE2
PE3
PE4
PE5
PE6
PE7
PF0
PF1
PF2
PF3
PF4
PF5
PF6
PF7
BGACK/BG
Emulator mode
disabled
Slave mode
disabled
Mode 01, 00
Single Chip
Default
MOTOROLA
4-61