MC68F375BGMZP33 Freescale Semiconductor, MC68F375BGMZP33 Datasheet - Page 546

• Manufacturer Part Number: MC68F375BGMZP33
• Description: IC MPU 32BIT 33MHZ 217-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68F375BGMZP33

• Processor Type: M683xx 32-Bit
• Speed: 33MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 217-PBGA
• Processor Series: M683xx
• Core: CPU32
• Data Bus Width: 32 bit
• Program Memory Type: Flash
• Program Memory Size: 256 KB
• Data Ram Size: 10 KB
• Interface Type: SPI, SCI, CAN
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 48
• Number Of Timers: 16
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Lead Free Status / Rohs Status: No

MC68F375
REFERENCE MANUAL
NOTES:
3
$###FWC
$###FWA
$###FWE
$###FW0
$###FW2
$###FW4
$###FW6
$###FW8
1. THE TPU DOES NOT CHECK THE VALUE OF LINK_CHANNEL_COUNT. IF THIS PARAMETER IS NOT > 0 AND
2. MAX_COUNT MAY BE WRITTEN AT ANY TIME BY THE HOST CPU, BUT IF THE VALUE WRITTEN IS
2
RESULTS ARE UNPREDICTABLE.
A PERIOD OR PULSE-WIDTH ACCUMULATION IS TERMINATED. IF THIS HAPPENS, THE NUMBER OF PERIODS OVER
WHICH THE ACCUMULATION IS DONE WILL NOT CORRESPOND TO MAX_COUNT.
1
1
1
1
0
0
0
0
0
0
W
START_LINK_CHANNEL
15
= WRITTEN BY CPU
= WRITTEN BY TPU
= CHANNEL NUMBER
CHANNEL FUNCTION SELECT
CHANNEL PRIORITY
HOST SEQUENCE BITS
HOST SERVICE BITS
INTERRUPT ENABLE
INTERRUPT STATUS
14
13
NAME
Freescale Semiconductor, Inc.
ACCUM_RATE
MAX_COUNT
12
For More Information On This Product,
Figure D-21 PPWA Parameters
LINK_CHANNEL_COUNT
11
Go to: www.freescale.com
TPU ROM FUNCTIONS
10
PPWA FUNCTION NUMBER
(ASSIGNED DURING MICRO-
CODE ASSEMBLY)
00 — CHANNEL DISABLED
01 — LOW PRIORITY
10 — MEDIUM PRIORITY
11 — HIGH PRIORITY
00 — ACCUMULATE 24-BIT PERIODS, NO LINKS
01 — ACCUMULATE 16-BIT PERIODS, LINKS
10 — ACCUMULATE 24-BIT PULSE WIDTHS, NO LINKS
11 — ACCUMULATE 16-BIT PULSE WIDTHS, LINKS
00 — NOT USED
01 — NOT USED
10 — INITIALIZE
11 — NOT USED
= WRITTEN BY CPU AND TPU
= UNUSED PARAMETERS
0 — INTERRUPT NOT ASSERTED
1 — INTERRUPT ASSERTED
CONTROL BITS
Rev. 25 June 03
9
PARAMETER RAM
LAST_ACCUM
OPTIONS
PPWA_LW
8
ACCUM
7
6
CHANNEL_CONTROL
PERIOD_COUNT
5
PPWA_UB
4
3
PERIOD_COUNT,
2
$###E0C–$###E12
$###E1C–$###E1E
$###E14–$###E16
$###E18–$###E1A
$###E0A
$###E20
ADDRESSES
1
8,
MOTOROLA
0
1049A
D-32