MC68F375BGMZP33 Freescale Semiconductor, MC68F375BGMZP33 Datasheet - Page 407

• Manufacturer Part Number: MC68F375BGMZP33
• Description: IC MPU 32BIT 33MHZ 217-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68F375BGMZP33

• Processor Type: M683xx 32-Bit
• Speed: 33MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 217-PBGA
• Processor Series: M683xx
• Core: CPU32
• Data Bus Width: 32 bit
• Program Memory Type: Flash
• Program Memory Size: 256 KB
• Data Ram Size: 10 KB
• Interface Type: SPI, SCI, CAN
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 48
• Number Of Timers: 16
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Lead Free Status / Rohs Status: No

11.1 Introduction
11.2 Programmer’s Model
11.2.1 SRAM Control Block
MC68F375
REFERENCE MANUAL
This SRAM module is a fast access (two clocks) general purpose 8K (8,192 bytes)
static RAM (SRAM) for the MCU and is accessed via the IMB3. In addition there is 2K
(configured as four blocks of 512 bytes each) of patch static RAM. These modules are
fast access (two clocks) general purpose static RAM (SRAM) for the MCU with a patch
option which provides a method to overlay the internal CMFI memory for emulation.
As an additional feature, the 512-byte arrays can be used as additional SRAM. A reg-
ister map showing the SRAM and overlay configuration registers and memory blocks
is shown in
The SRAM module is powered by V
standby SRAM if standby power is supplied via the V
between V
When used as general purpose SRAM, this module is accessed via the IMB3. The
SRAM may be read or written as either bytes or words. Access for aligned long-word
operations is supported by back-to-back IMB3 accesses (four clocks) to accommodate
32-bit operations.
Each SRAM module consists of two separately addressable sections. The first is a set
of memory mapped control and status registers used for configuration and testing of
the SRAM array. The second section is the array itself.
There are four registers provided for configuration and control of each SRAM module:
SRAM module configuration register (RAMMCR), a factory test register (RAMTST),
and the array base address registers (RAMBAH, RAMBAL). In order to offer the max-
imum protection for the SRAM array, the SRAM module control registers are located
in supervisor data space.
DDL
Figure
STATIC RANDOM ACCESS MEMORY (SRAM)
and V
11-1.
Freescale Semiconductor, Inc.
STATIC RANDOM ACCESS MEMORY (SRAM)
STBY
For More Information On This Product,
will occur automatically.
Go to: www.freescale.com
SECTION 11
Rev. 25 June 03
DDL
in normal operation and may be used as
STBY
pin of the MCU. Switching
MOTOROLA
11-1