MC68F375BGMZP33 Freescale Semiconductor, MC68F375BGMZP33 Datasheet - Page 194

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MC68F375BGMZP33

Manufacturer Part Number
MC68F375BGMZP33
Description
IC MPU 32BIT 33MHZ 217-PBGA
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC68F375BGMZP33

Processor Type
M683xx 32-Bit
Speed
33MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
217-PBGA
Processor Series
M683xx
Core
CPU32
Data Bus Width
32 bit
Program Memory Type
Flash
Program Memory Size
256 KB
Data Ram Size
10 KB
Interface Type
SPI, SCI, CAN
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
48
Number Of Timers
16
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-
Lead Free Status / Rohs Status
No

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68F375BGMZP33
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
5.10.3 Scan Modes
5.10.3.1 Disabled Mode
5.10.3.2 Reserved Mode
5.10.3.3 Single-Scan Modes
MC68F375
REFERENCE MANUAL
Another pause and end-of-queue boundary condition occurs when the pause and an
end-of-queue condition occur in the same CCW. Both the pause and end-of-queue
conditions are recognized simultaneously. The end-of-queue condition has prece-
dence so a conversion is not performed for the CCW and the pause flag is not set. The
QADC64 sets the completion flag and the queue status becomes idle. Examples of
this situation are:
The QADC64 queuing mechanism provides several methods for automatically scan-
ning input channels. In single-scan mode, a single pass through a sequence of
conversions defined by a queue is performed. In continuous-scan mode, multiple
passes through a sequence of conversions defined by a queue are executed. The pos-
sible modes are:
The following paragraphs describe the disabled/reserved, single-scan, and continu-
ous-scan operations.
When the disabled mode is selected, the queue is not active. Trigger events cannot
initiate queue execution. When both queue 1 and queue 2 are disabled, wait states are
not encountered for IMB accesses of the RAM. When both queues are disabled, it is
safe to change the QCLK prescaler values.
Reserved mode allows for future mode definitions. When the reserved mode is
selected, the queue is not active.
When the application software wants to execute a single pass through a sequence of
conversions defined by a queue, a single-scan queue operating mode is selected. By
programming the MQ field in QACR1 or QACR2, the following modes can be selected:
• The pause bit is set in CCW0 and EOQ is programmed into CCW0.
• During queue 1 operation, the pause bit is set in CCW20, which is also BQ2.
• Disabled and reserved mode
• Software initiated single-scan mode
• External trigger single-scan mode
• External gated single-scan mode (queue 1 only)
• Interval timer single-scan mode
• Software initiated continuous-scan mode
• External trigger continuous-scan mode
• External gated continuous-scan mode (queue 1 only)
• Interval timer continuous-scan mode
Do not use a reserved mode. Unspecified operations may result.
QUEUED ANALOG-TO-DIGITAL CONVERTER MODULE-64
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
Rev. 25 June 03
CAUTION
MOTOROLA
5-18

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