MC68F375BGMZP33 Freescale Semiconductor, MC68F375BGMZP33 Datasheet - Page 556

• Manufacturer Part Number: MC68F375BGMZP33
• Description: IC MPU 32BIT 33MHZ 217-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68F375BGMZP33

• Processor Type: M683xx 32-Bit
• Speed: 33MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 217-PBGA
• Processor Series: M683xx
• Core: CPU32
• Data Bus Width: 32 bit
• Program Memory Type: Flash
• Program Memory Size: 256 KB
• Data Ram Size: 10 KB
• Interface Type: SPI, SCI, CAN
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 48
• Number Of Timers: 16
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Lead Free Status / Rohs Status: No

D.17 Serial Input/Output Port (SIOP)
MC68F375
REFERENCE MANUAL
Da ta Out-Chan x+1
Clo c k Out-Chan x
Da ta In-C ha n x-1
Da ta Out-Cha n x+1
Cloc k O ut-Chan x
The serial input/output port (SIOP) TPU function uses two or three TPU channels to
form a uni- or bi-directional synchronous serial port that can be used to communicate
with a wide variety of devices. Features such as baud rate and transfer size are user
programmable. The function can also produce a clock-only, when it uses just one
channel.
The SIOP TPU function has been designed to closely resemble the SIOP hardware
port found on some Motorola MCUs and can be used to add serial capabilities to a de-
vice without a serial port, or extend the capabilities of one with a hardware synchro-
nous port.
SIOP operates in master mode (i.e., the TPU always generates the clock) and the fol-
lowing features are programmable by the user:
When a transfer of data is complete the SIOP function notifies the host CPU by issuing
an interrupt request. The arrangement of the multiple SIOP channels is fixed: the data
out channel is the channel above the clock channel and the data in channel is the
channel below the clock channel. In clock-only or uni-directional mode, the unused
TPU channels are free to run other TPU functions. Two possible SIOP configurations
are show in
1. Choice of clock-only (one channel), clock + transmit (two channels), clock + re-
2. Baud rate period is freely programmable by the user over a 15-bit range of
3. Selection of msb or lsb first shift direction
4. Variable transfer size from one to 16 bits
5. Clock polarity is programmable
ceive (two channels) or clock + transmit + receive (three channels) operating
modes
TCR1 counts
Figure
Figure D-27 Two Possible SIOP Configurations
10-bit output only transfer, LSB first with data valid on clock falling edge
D-27.
8-bit bi-directional transfer, MSB first with data valid on clock rising edge
Freescale Semiconductor, Inc.
For More Information On This Product,
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TPU ROM FUNCTIONS
Rev. 25 June 03
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