MC68F375BGMZP33 Freescale Semiconductor, MC68F375BGMZP33 Datasheet - Page 187

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MC68F375BGMZP33

Manufacturer Part Number
MC68F375BGMZP33
Description
IC MPU 32BIT 33MHZ 217-PBGA
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC68F375BGMZP33

Processor Type
M683xx 32-Bit
Speed
33MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
217-PBGA
Processor Series
M683xx
Core
CPU32
Data Bus Width
32 bit
Program Memory Type
Flash
Program Memory Size
256 KB
Data Ram Size
10 KB
Interface Type
SPI, SCI, CAN
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
48
Number Of Timers
16
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-
Lead Free Status / Rohs Status
No

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
MC68F375BGMZP33
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
5.8 Analog Input Channels
5.9 Analog Subsystem
MC68F375
REFERENCE MANUAL
conversion queues as directly connected signals. Software simply puts the channel
number of an externally multiplexed channel into a CCW.
Figure 5-3
multiplexing is selected, none of the MA[2:0] pins can be used for analog or digital
inputs. They become multiplexed address outputs.
The number of available analog channels varies, depending on whether or not external
multiplexing is used. A maximum of 16 analog channels are supported by the internal
multiplexing circuitry of the converter.
input channels supported with zero-to-four external multiplexers.
The QADC64 analog subsystem includes a front-end analog multiplexer, a digital-to-
analog converter (DAC) array, a comparator, and a successive approximation register
(SAR).
The analog subsystem path runs from the input pins through the input multiplexing cir-
cuitry, into the DAC array, and through the analog comparator. The output of the
comparator feeds into the SAR.
Figure 5-4
NOTES:
No External
Mux Chips
1. When external multiplexing is used, three input channels become multiplexed address out-
puts, and for each external multiplexer chip, one input channel becomes a multiplexed ana-
log input.
16
shows that MA[2:0] may also be analog or digital input pins. When external
shows a block diagram of the QADC64 analog submodule.
QUEUED ANALOG-TO-DIGITAL CONVERTER MODULE-64
Directly Connected + External Multiplexed = Total Channels
Freescale Semiconductor, Inc.
One External
12 + 8 = 20
For More Information On This Product,
Mux Chip
Number of Analog Input Channels Available
Table 5-2 Analog Input Channels
Go to: www.freescale.com
Rev. 25 June 03
Two External
11 + 16 = 27
Mux Chips
Table 5-2
Three External
shows the total number of analog
10 + 24 = 34
Mux Chips
1
Four External
Mux Chips
9 + 32 = 41
MOTOROLA
5-11

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