MC68F375BGMZP33 Freescale Semiconductor, MC68F375BGMZP33 Datasheet - Page 105

• Manufacturer Part Number: MC68F375BGMZP33
• Description: IC MPU 32BIT 33MHZ 217-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68F375BGMZP33

• Processor Type: M683xx 32-Bit
• Speed: 33MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 217-PBGA
• Processor Series: M683xx
• Core: CPU32
• Data Bus Width: 32 bit
• Program Memory Type: Flash
• Program Memory Size: 256 KB
• Data Ram Size: 10 KB
• Interface Type: SPI, SCI, CAN
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 48
• Number Of Timers: 16
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Lead Free Status / Rohs Status: No

4.4 System Protection
MC68F375
REFERENCE MANUAL
variations in the output of the RC oscillator due to processing and/or operating
conditions.
The loss of clock detector can be disabled by writing a one to the loss of clock oscillator
bit (LOSCD). This disables the free-running RC oscillator and prevents f
being detected. The reset state of LOSCD is zero which enables the RC oscillator and
loss of clock detector.
The reset enable bit (RSTEN) determines how the MCU will process a loss of clock
detection. The default state out of reset for RSTEN is zero. This forces the clock syn-
thesizer into the limp mode operating state. In limp mode, the RC oscillator used by
the loss of clock detector provides the system clock. Limp mode frequency varies from
device-to-device but does not exceed one-half the maximum system clock frequency.
When set to one, RSTEN allows the clock synthesizer to reset the MCU when the loss
of clock detector triggers. After powering-up from a loss of clock reset, the MCU will
set the LOC bit in the reset status register (RSR) and begin operation in limp mode.
The limp status bit (SLIMP) in SYNCR indicates that f
has entered limp mode. SLIMP will remain set until normal f
The system protection block reports reset status information, monitors internal bus
activity, and provides periodic interrupt generation.
the submodule.
SINGLE-CHIP INTEGRATION MODULE 2 (SCIM2E)
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
Rev. 25 June 03
Figure 4-7
ref
has failed and that the MCU
ref
operation is restored.
is a block diagram of
ref
MOTOROLA
loss from
4-23