MC68F375BGMZP33 Freescale Semiconductor, MC68F375BGMZP33 Datasheet - Page 126

• Manufacturer Part Number: MC68F375BGMZP33
• Description: IC MPU 32BIT 33MHZ 217-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68F375BGMZP33

• Processor Type: M683xx 32-Bit
• Speed: 33MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 217-PBGA
• Processor Series: M683xx
• Core: CPU32
• Data Bus Width: 32 bit
• Program Memory Type: Flash
• Program Memory Size: 256 KB
• Data Ram Size: 10 KB
• Interface Type: SPI, SCI, CAN
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 48
• Number Of Timers: 16
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Lead Free Status / Rohs Status: No

MC68F375
REFERENCE MANUAL
External breakpoint circuitry must decode the function code and address lines, place
an instruction word on the data bus, and assert BERR. The CPU32 then performs
hardware breakpoint exception processing: it acquires the number of the hardware
breakpoint exception vector, computes the vector address from this number, loads the
content of the vector address into the PC, and jumps to the exception handler routine
at that address. If the external device asserts DSACK rather than BERR, the CPU32
ignores the breakpoint and continues processing.
When BKPT assertion is synchronized with an instruction prefetch, processing of the
breakpoint exception occurs at the end of that instruction. The prefetched instruction
is “tagged” with the breakpoint when it enters the instruction pipeline. The breakpoint
exception occurs after the instruction executes. If the pipeline is flushed before the
tagged instruction is executed, no breakpoint occurs. When BKPT assertion is syn-
chronized with an operand fetch, exception processing occurs at the end of the
instruction during which BKPT is latched.
Refer to the
Manual (SCIMRM/AD)
CPU32 is shown in
CPU32 Reference Manual (CPU32RM/AD)
SINGLE-CHIP INTEGRATION MODULE 2 (SCIM2E)
Figure
Freescale Semiconductor, Inc.
For More Information On This Product,
for additional information. Breakpoint operation flow for the
4-14.
Go to: www.freescale.com
Rev. 25 June 03
and the
SCIM Reference
MOTOROLA
4-44