MC68F375BGMZP33 Freescale Semiconductor, MC68F375BGMZP33 Datasheet - Page 178

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MC68F375BGMZP33

Manufacturer Part Number
MC68F375BGMZP33
Description
IC MPU 32BIT 33MHZ 217-PBGA
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC68F375BGMZP33

Processor Type
M683xx 32-Bit
Speed
33MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
217-PBGA
Processor Series
M683xx
Core
CPU32
Data Bus Width
32 bit
Program Memory Type
Flash
Program Memory Size
256 KB
Data Ram Size
10 KB
Interface Type
SPI, SCI, CAN
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
48
Number Of Timers
16
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-
Lead Free Status / Rohs Status
No

Available stocks

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Part Number:
MC68F375BGMZP33
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
5.2 Features
5.3 QADC64 Pin Functions
MC68F375
REFERENCE MANUAL
The QADC64 module offers the following features:
The QADC64 module uses the following 36 pins:
The 16 channel/port pins can support up to 41 channels when external multiplexing is
used (including internal channels). All of the channel pins can also be used as general-
purpose digital port pins.
The following paragraphs describe QADC64 pin functions.
QADC64 module pins.
• Internal sample and hold
• Up to 16 analog input channels using internal multiplexing
• Directly supports up to four external multiplexers (for example, the MC14051)
• Up to 41 total input channels with internal and external multiplexing
• Programmable input sample time for various source impedances
• Two conversion command queues with a total of 64 entries
• Sub-queues possible using pause mechanism
• Queue complete and pause software interrupts available on both queues
• Queue pointers indicate current location for each queue
• Automated queue modes initiated by:
• Single-scan or continuous-scan of queues
• 64 result registers
• Output data readable in three formats:
• Unused analog channels can be used as digital ports
• 2 analog reference pins, to which all analog input voltages are scaled
• 16 analog input pins with 3 analog inputs multiplexed with multiplex address sig-
• 16 analog input pins through the on-chip AMUX circuit
• 2 analog power pins (V
• 2 trigger pins shared with AN[55:56]/PQA[3:4]
nals and 2 multiplexed with the on-chip analog multiplexer inputs
— External edge trigger [queues 1 and 2] and gated mode [queue 1 only]
— Periodic/interval timer, within QADC64 module [queues 1 and 2]
— Software command [queues 1 and 2]
— Right-justified unsigned
— Left-justified signed
— Left-justified unsigned
QUEUED ANALOG-TO-DIGITAL CONVERTER MODULE-64
Freescale Semiconductor, Inc.
For More Information On This Product,
DDA
Go to: www.freescale.com
, V
Rev. 25 June 03
SSA
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Figure 5-2
MOTOROLA
shows the
5-2

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