MC68F375BGMZP33 Freescale Semiconductor, MC68F375BGMZP33 Datasheet - Page 141

• Manufacturer Part Number: MC68F375BGMZP33
• Description: IC MPU 32BIT 33MHZ 217-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68F375BGMZP33

• Processor Type: M683xx 32-Bit
• Speed: 33MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 217-PBGA
• Processor Series: M683xx
• Core: CPU32
• Data Bus Width: 32 bit
• Program Memory Type: Flash
• Program Memory Size: 256 KB
• Data Ram Size: 10 KB
• Interface Type: SPI, SCI, CAN
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 48
• Number Of Timers: 16
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Lead Free Status / Rohs Status: No

4.7.7.2 Reset States of Pins Assigned to Other MCU Modules
MC68F375
REFERENCE MANUAL
RESET is released. Mode select inputs are driven to the appropriate states at this
time. Use an active circuit, such as that shown in
4-24
As a rule, module pins that can be configured for general purpose I/O go into a high-
impedance state during reset. However, during power-on reset, module port pins may
be in an indeterminate state for a short period of time. Refer to
for more information.
shows the state of SCIM2E pins during reset.
ADDR[22:19]/CS[9:6]/PC[6:3]
ADDR23/CS10/ECLK
ADDR[18:11]/PA]7:0]
ADDR[10:3]/PB[7:0]
DATA[15:8]/PG[7:0]
DATA[7:0]/PH[7:0]
Table 4-24 SCIM2E Pin States During Reset
IRQ[7:1]/PF[7:1]
SIZ[1:0]/PE[7:6]
FASTREF/PF0
FC0/CS3/PC0
FC2/CS3/PC2
SINGLE-CHIP INTEGRATION MODULE 2 (SCIM2E)
DSACK0/PE0
DSACK1/PE1
BGACK/CSE
AVEC/PE2
ADDR[2:0]
Freescale Semiconductor, Inc.
CSBOOT
CLKOUT
FC1/PC1
BG/CSM
AS/PE5
BR/CS0
DS/PE4
RESET
Pin(s)
BERR
HALT
For More Information On This Product,
TSC
PE3
R/W
Go to: www.freescale.com
Rev. 25 June 03
Pin State During RESET
Three State Enable Input
Figure
Mode Select Inputs
Mode Select Inputs
Mode Select Input
Mode Select Input
Asserted
High-Z
High-Z
High-Z
High-Z
High-Z
Output
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
V
V
V
V
V
V
V
V
V
4-19, for this purpose.
DD
DD
DD
DD
DD
DD
DD
DD
DD
4.7.6 Power-On Reset
MOTOROLA
Table
4-59