MC68F375BGMZP33 Freescale Semiconductor, MC68F375BGMZP33 Datasheet - Page 235

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MC68F375BGMZP33

Manufacturer Part Number
MC68F375BGMZP33
Description
IC MPU 32BIT 33MHZ 217-PBGA
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC68F375BGMZP33

Processor Type
M683xx 32-Bit
Speed
33MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
217-PBGA
Processor Series
M683xx
Core
CPU32
Data Bus Width
32 bit
Program Memory Type
Flash
Program Memory Size
256 KB
Data Ram Size
10 KB
Interface Type
SPI, SCI, CAN
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
48
Number Of Timers
16
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-
Lead Free Status / Rohs Status
No

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68F375BGMZP33
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
6.1 Overview
6.2 Block Diagram
MC68F375
REFERENCE MANUAL
The queued serial multi-channel module (QSMCM) provides three serial communica-
tion interfaces: the queued serial peripheral interface (QSPI) and two serial
communications interfaces (SCI1 and SCI2). These submodules communicate with
the CPU via a common slave bus interface unit (SBIU).
The QSPI is a full-duplex, synchronous serial interface for communicating with periph-
erals and other MCUs. It is enhanced from the original SPI in the QSMCM (queued
serial module) to include a total of 160 bytes of queue RAM to accommodate more
receive, transmit, and control information. The QSPI is fully compatible with the SPI
systems found on other Motorola devices.
The dual, independent SCIs are used to communicate with external devices and other
MCUs via an asynchronous serial bus. Each SCI is a full-duplex universal asynchro-
nous receiver transmitter (UART) serial interface. The original QSMCM SCI is
enhanced by the addition of an SCI and a common external baud clock source.
The SCI1 has the ability to use the resultant baud clock from SCI2 as the input clock
source for the SCI1 baud rate generator. Also, the SCI1 has an additional mode of
operation that allows queuing of transmit and receive data frames. If the queue feature
is enabled, a set of 16 entry queues is allocated for the receive and/or transmit
operation.
Figure 6-1
depicts the major components of the QSMCM.
QUEUED SERIAL MULTI-CHANNEL MODULE
Freescale Semiconductor, Inc.
QUEUED SERIAL MULTI-CHANNEL MODULE
For More Information On This Product,
Go to: www.freescale.com
Rev. 25 June 03
SECTION 6
MOTOROLA
6-1

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