MC68F375BGMZP33 Freescale Semiconductor, MC68F375BGMZP33 Datasheet - Page 484

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MC68F375BGMZP33

Manufacturer Part Number
MC68F375BGMZP33
Description
IC MPU 32BIT 33MHZ 217-PBGA
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC68F375BGMZP33

Processor Type
M683xx 32-Bit
Speed
33MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
217-PBGA
Processor Series
M683xx
Core
CPU32
Data Bus Width
32 bit
Program Memory Type
Flash
Program Memory Size
256 KB
Data Ram Size
10 KB
Interface Type
SPI, SCI, CAN
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
48
Number Of Timers
16
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-
Lead Free Status / Rohs Status
No

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68F375BGMZP33
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
13.11.4 CTM9 Single Output Compare
MC68F375
REFERENCE MANUAL
Prescaler
Select
of not missing samples by insuring that the interrupt response time is faster than the
fastest input period. Alternately, when the software is just interested in the latest period
measurement, one 32-bit coherent read instruction can get both the current and the
previous samples. Depending on the prescaler divide ratio, period times can be mea-
sured from 0.119 microseconds to 3 seconds.
Figure 13-17
of period measurement. The software designates whether the rising or falling edge of
the input signal is to be used for the measurements. When the edge is detected, the
state of the time-base bus is stored in register A, and the content of register B1 is trans-
ferred into register B2. After register B2 is safely latched, the content of register A is
transferred to register B1. This procedure gives the software coherent current and pre-
vious samples in registers A and B2 at all times. An interrupt is available for the cases
where the software needs to be aware of each new sample. Note that a software
option is provided to also generate an interrupt after the first edge.
To create one output edge, the software can use an SASM channel. The software pro-
vides a compare value in a register and the SASM compares that value to the
incrementing value seen on one of the time-base buses. When a comparison is
detected, the state of the output pin is changed.
The example shown in
an SASM to create an output signal. The software can read the current state of the
counter submodule. That, or some other criteria, is used to determine the time-base
Clock
or Pin
From
Modulus Counter Submodule
Figure 13-17 CTM9 Example — Double Capture Period Measurement
Free-Running or
Free-Running or
16-Bit Up Counter
shows a counter submodule and a DASM combination as an example
Freescale Semiconductor, Inc.
For More Information On This Product,
CONFIGURABLE TIMER MODULE (CTM9)
Figure 13-18
Select
Bus
Submodule Bus
Go to: www.freescale.com
Buses
16-Bit
Time-
Base
Rev. 25 June 03
Two
uses a counter submodule with one channel of
Select
Bus
16-Bit Register A
16-Bit Register B1
16-Bit Register B2
Double Action Submodule
Designated
Interrupt
Capture
Detect
Edge
Input
Edge
on
MOTOROLA
Input
Pin
13-58

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