MC68F375BGMZP33 Freescale Semiconductor, MC68F375BGMZP33 Datasheet - Page 29

• Manufacturer Part Number: MC68F375BGMZP33
• Description: IC MPU 32BIT 33MHZ 217-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68F375BGMZP33

• Processor Type: M683xx 32-Bit
• Speed: 33MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 217-PBGA
• Processor Series: M683xx
• Core: CPU32
• Data Bus Width: 32 bit
• Program Memory Type: Flash
• Program Memory Size: 256 KB
• Data Ram Size: 10 KB
• Interface Type: SPI, SCI, CAN
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 48
• Number Of Timers: 16
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Lead Free Status / Rohs Status: No

Number
10-7 CMF Erase Algorithm (v6) ............................................................................... 10-14
10-8 CMFIBAR (CMFIBAH, CMFIBAL) Bit Settings ................................................ 10-15
10-9 CMFICTL1 Bit Settings .................................................................................... 10-16
10-10 CMFICTL2 Bit Settings.................................................................................. 10-17
10-11 System Clock Range ..................................................................................... 10-20
10-12 Clock Period Exponent and Pulse Width Range ........................................... 10-21
10-13 Program Interlock State Descriptions ............................................................ 10-28
10-14 Results of Programming Margin Read........................................................... 10-30
10-15 Register Shadow Information ........................................................................ 10-31
10-16 Erase Interlock State Descriptions................................................................. 10-33
11-1 RAMMCR Bit Settings ....................................................................................... 11-4
11-2 RASP Encoding ................................................................................................. 11-4
11-3 RAMBAH, RAMBAL Bit Settings ...................................................................... 11-5
11-4 SRAM Array Read/Write Minimum Access Times............................................. 11-6
12-1 ROM Module Register Map ............................................................................... 12-3
12-2 ROMMCR Bit Settings ....................................................................................... 12-4
12-3 BAR (ROMBAH, ROMBAL) Bit Settings............................................................ 12-6
12-4 SIGHI Bit Settings.............................................................................................. 12-6
12-5 SIGLO Bit Settings............................................................................................. 12-7
12-6 Minimum ROM Module Access Times............................................................. 12-11
13-1 CTM9 Configuration Description........................................................................ 13-3
13-2 FCSM Register Map .......................................................................................... 13-7
13-3 FMSMSIC Bit Settings ....................................................................................... 13-8
13-4 MCSM Register Map ....................................................................................... 13-12
13-5 MCSMSIC Bit Settings..................................................................................... 13-13
13-6 SASM Register Map ........................................................................................ 13-20
13-7 SICA Bit Settings ............................................................................................. 13-21
13-8 DASM Modes of Operation.............................................................................. 13-25
13-9 DASM PWM Example Output
13-10 DASM Register Map...................................................................................... 13-35
13-11 DASMSIC Bit Settings ................................................................................... 13-36
13-12 PWM Pulse and Frequency Ranges (in Hz)
13-13 PWM Pulse and FrequencyRanges (in Hz)
13-14 PWMSM Register Map .................................................................................. 13-45
13-15 PWMSIC Bit Settings..................................................................................... 13-46
13-16 PWMSM Output Pin Polarity Selection.......................................................... 13-48
13-17 PWMSM Clock Rate Selection ...................................................................... 13-48
13-18 BIUSM Register Map ..................................................................................... 13-51
13-19 BIUMCR Bit Settings ..................................................................................... 13-51
13-20 CPSM Register Map...................................................................................... 13-53
MC68F375
REFERENCE MANUAL
Table
Frequencies/Resolutions at fSYS = 16 MHz ............................................... 13-34
Using /2 Option (16.78 MHz)....................................................................... 13-43
Using /3 Option (16.78 MHz)....................................................................... 13-43
Freescale Semiconductor, Inc.
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LIST OF TABLES
Rev. 25 June 03
MOTOROLA
Number
Page
xxix