MC68F375BGMZP33 Freescale Semiconductor, MC68F375BGMZP33 Datasheet - Page 383

• Manufacturer Part Number: MC68F375BGMZP33
• Description: IC MPU 32BIT 33MHZ 217-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68F375BGMZP33

• Processor Type: M683xx 32-Bit
• Speed: 33MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 217-PBGA
• Processor Series: M683xx
• Core: CPU32
• Data Bus Width: 32 bit
• Program Memory Type: Flash
• Program Memory Size: 256 KB
• Data Ram Size: 10 KB
• Interface Type: SPI, SCI, CAN
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 48
• Number Of Timers: 16
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Lead Free Status / Rohs Status: No

MC68F375
REFERENCE MANUAL
Bit(s)
No. of Pulses
15:12
10:8
max. 10,000
4:0
11
7
6
5
20
20
20
4
4
4
4
PAWS[0:2]
Name
GDB
NVR
STE
—
—
—
Pulse Width
Table 10-6 CMF Programming Algorithm (v6 and Later)
256 s
256 s
256 s
256 s
Reserved
Negative voltage range. This bit switches between the low and high voltage range of the nega-
tive charge pump in programming and erasing the CMF Flash module when GDB = 0b1. This
bit is writeable when HVS = 0b0.
0 = High Range (more negative)
1 = Low Range
Program amplitude/width modulation select. The PAWS bits can be used to select the program-
ming voltage applied to the drain of the EEPROM bitcell. These bits should be left-set to 000.
For information about PAWS programming modes, see
Reserved
This bit is reserved for Motorola factory testing and should always be programmed to 0b0.
0 = Normal Operation
1 = Factory test mode use only. This setting could disturb contents of flash
Gate/drain bias select. This bit works in conjunction with the PAWS bits to select between
positive and negative ramped voltages for programing and erasing. This bit is writeable when
SES = 0b0.
0 = Positive voltage ramp selected on the bitcell drain
1 = Negative voltage ramp selected on the bitcell gate
Reserved
50 s
50 s
50 s
50 s
Freescale Semiconductor, Inc.
CDR MoneT FLASH FOR THE IMB3 (CMFI)
For More Information On This Product,
Table 10-5 CMFITST Bit Settings
NVR
1
1
1
1
0
0
0
0
Go to: www.freescale.com
PAWs
100
101
110
111
100
101
110
111
Rev. 25 June 03
GDB
1
1
1
1
1
1
1
1
Description
Mode 4NL
Mode 5NL
Mode 6NL
Mode 7NL
Mode 4NL
Mode 5NL
Mode 6NL
Mode 7NL
PAWs
Mode
Table
Negative gate ramp (high range)
Negative gate ramp (low range)
10-6.
Description
MOTOROLA
10-13