MC68F375BGMZP33 Freescale Semiconductor, MC68F375BGMZP33 Datasheet - Page 142

• Manufacturer Part Number: MC68F375BGMZP33
• Description: IC MPU 32BIT 33MHZ 217-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68F375BGMZP33

• Processor Type: M683xx 32-Bit
• Speed: 33MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 217-PBGA
• Processor Series: M683xx
• Core: CPU32
• Data Bus Width: 32 bit
• Program Memory Type: Flash
• Program Memory Size: 256 KB
• Data Ram Size: 10 KB
• Interface Type: SPI, SCI, CAN
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 48
• Number Of Timers: 16
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Lead Free Status / Rohs Status: No

4.7.8 Operating Configuration Out of Reset
4.7.8.1 Operating Mode Selection
MC68F375
REFERENCE MANUAL
When RESET is released, the SCIM2E acquires setup information from several MCU
pins. Individually or in groups, these pins control the four basic areas of MCU config-
uration outlined in
Clock mode is not listed in
released. Instead, it is latched immediately from V
PF0 upon assertion of RESET. Refer to
information.
The logic states of BERR and DATA1 determine MCU operating mode when RESET
is released. Care should be taken to guarantee that BERR is driven to a known state
during reset. Unlike DATA1 which has a weak pull-up resistor, no conditioning circuitry
is present on the BERR pin. If BERR is allowed to float during reset, improper mode
determination may occur. Operating mode selection is summarized in
The configuration of the SCIM2E EBI is dependent on operating mode. ADDR[18:3]
serve as general purpose I/O ports A and B when the MCU is running in single-chip
mode. DATA[7:0] serve as general purpose I/O port H in the single-chip and 8-bit
expanded modes, and DATA[15:8] serve as general purpose I/O port G in single-chip
mode.
Background Debug Mode Disable/Enable
Flash/ROM Module Disable/Enable
Operating Mode Selection
SCIM2E I/O Port Configuration
Table 4-25 Pins Associated with Basic Configuration Options
SINGLE-CHIP INTEGRATION MODULE 2 (SCIM2E)
Table
Freescale Semiconductor, Inc.
For More Information On This Product,
4-25.
Option
Table 4-25
Go to: www.freescale.com
Rev. 25 June 03
because it is not selected when RESET is
4.3.1 System Clock Sources
DDSYN
DATA[11:2], DATA0
Controlling Pins
BERR, DATA1
DATA[15:12]
/MODCLK and FASTREF/
BKPT
Table
MOTOROLA
for more
4-26.
4-60