MC68F375BGMZP33 Freescale Semiconductor, MC68F375BGMZP33 Datasheet - Page 614

• Manufacturer Part Number: MC68F375BGMZP33
• Description: IC MPU 32BIT 33MHZ 217-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68F375BGMZP33

• Processor Type: M683xx 32-Bit
• Speed: 33MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 217-PBGA
• Processor Series: M683xx
• Core: CPU32
• Data Bus Width: 32 bit
• Program Memory Type: Flash
• Program Memory Size: 256 KB
• Data Ram Size: 10 KB
• Interface Type: SPI, SCI, CAN
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 48
• Number Of Timers: 16
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Lead Free Status / Rohs Status: No

TPU Reference Manual 8-3, 8-16
TPU2
TPUF 8-13
TPUMCR 8-10
TPUMCR2 8-18
Trace
Transfer
Transmission
Transmit
Transmitter Enable (TE) 6-44
Transmitter enable (TE) 6-46, 6-53
Trigger
TSC 4-69
TSM D-7
T
TST 4-56
TSYNC 7-28
TX
TX/RX 7-32
TXECTR 7-34
TXMODE 7-26
TXWARN 7-31
UART D-12
MC68F375
REFERENCE MANUAL
SR
scheduler 8-2
time
timer channels 8-2
module configuration register 2 (TPUMCR2) 8-18
on instruction execution 3-19
length options 6-36
complete
/receive status (TX/RX) 7-32
bit error (BITERR) 7-31
complete
data
error status flag (TXWARN) 7-31
interrupt enable (TIE) 6-46, 6-54
pin configuration control (TXMODE) 7-26
RAM 6-22
event 5-46
5-7
Length 7-5
development
host
link register (LR) 8-18
module configuration register (TPUMCR) 8-10
service grant latch register (SGLR) 8-18
test configuration register (TCR) 8-12
TPU interrupt configuration register (TICR) 8-14,
bases 8-2
(TC) flag 6-53
interrupt enable (TCIE) 6-54
bit (TC) 6-48
interrupt enable (TCIE) 6-46
register empty (TDRE) flag 6-48
support control register (DSCR) 8-12
support status register (DSSR) 8-13
sequence registers (HSQR) 8-15
service request registers (HSSR) 8-16
8-20
–U–
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
Rev. 25 June 03
INDEX
Unimplemented instruction emulation 3-19
Universal asynchronous receiver/transmitter (UART)
User stack pointer (USP) 3-10
Using the TPU Function Library and TPU Emulation
USP 3-10
V (overflow) flag 3-6
VBR 3-7, 3-16
V
V
V
V
V
Vector base register (VBR) 3-7, 3-16
V
V
Virtual memory 3-9
Voltage
V
V
V
V
WAKE 6-46, 6-56
Wake interrupt (WAKEINT) 7-32
WAKEINT 7-17, 7-32
WAKEMSK 7-17
Wakeup
Wired-OR
wired-or 13-36
WOMQ 6-17
WOMS 6-46, 6-53
WOR - bit in DASMSIC 13-36
Wrap
Wraparound mode 6-15
WREN 6-19
Write
Write cycle
WRTO 6-19
DD
DD
DDA
DDA/2
DDSYN
IH
IL
RH
RL
SS
SSA
5-8
5-8
5-5, 5-14, 5-49
parameters
reference pins 5-5
5-6
address mark (WAKE) 6-46, 6-56
mode
enable (WREN) 6-19
to (WRTO) 6-19
master 6-37
cycle 4-40
timing diagram E-11
4-57
5-6
5-5, 5-14, 5-49
5-6
5-6
5-14
/MODCLK 4-6, 4-57, 4-60
D-12
receiver parameters D-14
transmitter parameters D-13
Mode 8-4
for QSPI pins (WOMQ) 6-17
for SCI pins (WOMS) 6-46, 6-53
flowchart 4-41
–W–
–V–
MOTOROLA
Index-16