MC68F375BGMZP33 Freescale Semiconductor, MC68F375BGMZP33 Datasheet - Page 185

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MC68F375BGMZP33

Manufacturer Part Number
MC68F375BGMZP33
Description
IC MPU 32BIT 33MHZ 217-PBGA
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC68F375BGMZP33

Processor Type
M683xx 32-Bit
Speed
33MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
217-PBGA
Processor Series
M683xx
Core
CPU32
Data Bus Width
32 bit
Program Memory Type
Flash
Program Memory Size
256 KB
Data Ram Size
10 KB
Interface Type
SPI, SCI, CAN
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
48
Number Of Timers
16
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-
Lead Free Status / Rohs Status
No

Available stocks

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Part Number:
MC68F375BGMZP33
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10 000
5.6.2 Port Data Direction Register
5.7 External Multiplexing Operation
MC68F375
REFERENCE MANUAL
Port B pins are referred to as PQB when used as an 8-bit input-only digital port. Port
B can also be used for non-multiplexed AN[51:48]/AN[3:0] and multiplexed ANz, ANy,
ANx, ANw analog inputs.
PORTQA and PORTQB are unaffected by reset. Refer to
ister
The port data direction register (DDRQA) is associated with the port A digital I/O pins.
These bidirectional pins may have somewhat higher leakage and capacitance speci-
fications. Refer to
information.
Any bit in this register set to one configures the corresponding pin as an output. Any
bit in this register cleared to zero configures the corresponding pin as an input. Soft-
ware is responsible for ensuring that DDRQA bits are not set to one on pins used for
analog inputs. When a DDRQA bit is set to one and the pin is selected for analog con-
version, the voltage sampled is that of the output digital driver as influenced by the
load.
Since port B is input-only, a data direction register is not needed. Read operations on
the reserved bits in DDRQA return zeros, and writes have no effect. Refer to
Port Data Direction Register
External multiplexers concentrate a number of analog signals onto a few inputs to the
analog converter. This is helpful in applications that need to convert more analog sig-
nals than the A/D converter can normally provide. External multiplexing also puts the
multiplexer closer to the signal source. This minimizes the number of analog signals
that need to be shielded due to the close proximity of noisy, high speed digital signals
near the MCU.
The QADC64 can use from one-to-four external multiplexers to expand the number of
analog signals that may be converted. Up to 32 analog channels can be converted
through external multiplexer selection. The externally multiplexed channels are auto-
for register and bit descriptions.
Caution should be exercised when mixing digital and analog inputs.
This should be minimized as much as possible. Input pin rise and fall
times should be as large as possible to minimize AC coupling effects.
The main QADC64 treats the AMX as an external multiplexer. It is
recommended that full external multiplexing not be used on the
MC68F375. Mixed internal and external multiplexing should be used.
See
5.13.2 Mixed AMUX/External Multiplexing
QUEUED ANALOG-TO-DIGITAL CONVERTER MODULE-64
Freescale Semiconductor, Inc.
APPENDIX E ELECTRICAL CHARACTERISTICS
For More Information On This Product,
Go to: www.freescale.com
for register and bit descriptions.
Rev. 25 June 03
NOTE
NOTE
5.12.3 Port A/B Data Reg-
and
Figure
5-13.
MOTOROLA
for more
5.12.4
5-9

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