MC68F375BGMZP33 Freescale Semiconductor, MC68F375BGMZP33 Datasheet - Page 390

• Manufacturer Part Number: MC68F375BGMZP33
• Description: IC MPU 32BIT 33MHZ 217-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68F375BGMZP33

• Processor Type: M683xx 32-Bit
• Speed: 33MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 217-PBGA
• Processor Series: M683xx
• Core: CPU32
• Data Bus Width: 32 bit
• Program Memory Type: Flash
• Program Memory Size: 256 KB
• Data Ram Size: 10 KB
• Interface Type: SPI, SCI, CAN
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 48
• Number Of Timers: 16
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Lead Free Status / Rohs Status: No

CMFIBS3 — CMFI Bootstrap Word 3
10.4.8 Pulse Width Timing Control
MC68F375
REFERENCE MANUAL
MSB
NOTES:
15
U
RESET:
1
1. The default state of these bits is read from the shadow row on reset.
To control the pulse widths for program and erase operations the CMFI EEPROM uses
the system clock and the timing control in CMFICTL. The control of the program/erase
pulse timing is divided into three functions. The total pulse time is defined by the fol-
lowing pulse width equation:
101, 110 and 111
SCLKR[2:0]
U
14
1
Pulse Width = System Clock Period
Where: R = Clock Scaling,
N = 5 + CLKPE[1:0] + (PE
000
001
010
011
100
13
U
The minimum specified system clock frequency for performing pro-
gram and erase operations is 8.0 MHz. The CMFI EEPROM does not
have any means to monitor the system clock frequency and will not
prevent program or erase operation at frequencies below 8.0 MHz.
Attempting to program or erase the CMFI EEPROM at system clock
frequencies lower than 8.0 MHz will not damage the device if the
maximum pulse times and total times are not exceeded. While some
bits in the CMFI EEPROM array may change state if programmed or
erased at system clock frequencies below 8.0 MHz, the full program
or erase transition is not assured.
1
12
U
1
Program and erase timing control not specified and pulse
will not be terminated by the timer control. Recovery time
will be specified to be 128 clocks.
Freescale Semiconductor, Inc.
U
11
1
CDR MoneT FLASH FOR THE IMB3 (CMFI)
For More Information On This Product,
Table 10-11 System Clock Range
Minimum
10
U
NOTE: NOT FOR CUSTOMER USE
1
System Clock Frequency (MHz)
12
18
24
8
Go to: www.freescale.com
U
9
1
•
Table
Rev. 25 June 03
10)
U
8
PC[15:0]
1
Reserved by Motorola for future use
10-11,
NOTE
•
U
7
1
R
•
2
Maximum
U
6
N
1
•
12
18
24
33
M
U
5
1
U
4
1
U
3
1
Clock Scaling (R)
U
2
1
0xYF F816
3/2
1
1
2
3
MOTOROLA
U
1
1
10-20
LSB
U
0
1