MC68F375BGMZP33 Freescale Semiconductor, MC68F375BGMZP33 Datasheet - Page 349

• Manufacturer Part Number: MC68F375BGMZP33
• Description: IC MPU 32BIT 33MHZ 217-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68F375BGMZP33

• Processor Type: M683xx 32-Bit
• Speed: 33MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 217-PBGA
• Processor Series: M683xx
• Core: CPU32
• Data Bus Width: 32 bit
• Program Memory Type: Flash
• Program Memory Size: 256 KB
• Data Ram Size: 10 KB
• Interface Type: SPI, SCI, CAN
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 48
• Number Of Timers: 16
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Lead Free Status / Rohs Status: No

MC68F375
REFERENCE MANUAL
0xYF FF00 – 0xYF FF0F Channel 0 Parameter Registers
0xYF FF10 – 0xYF FF1F Channel 1 Parameter Registers
0xYF FE0C
0xYF FE1C
0xYF FE2C
0xYF FE0A
0xYF FE0E
0xYF FE1A
0xYF FE1E
0xYF FE2A
0xYF FE2E
0xYF FE00
0xYF FE02
0xYF FE04
0xYF FE06
0xYF FE08
0xYF FE10
0xYF FE12
0xYF FE14
0xYF FE16
0xYF FE18
0xYF FE20
0xYF FE22
0xYF FE24
0xYF FE26
0xYF FE28
Address
Freescale Semiconductor, Inc.
For More Information On This Product,
Table 8-5 TPU3 Register Map
MSBLSB
150
TPU3 Module Configuration Register (TPUMCR)
See
TPU3 Test Configuration Register (TCR)
Development Support Control Register (DSCR)
See
Development Support Status Register (DSSR)
See
TPU3 Interrupt Configuration Register (TICR)
See
Channel Interrupt Enable Register (CIER)
See
Channel Function Selection Register 0 (CFSR0)
See
Channel Function Selection Register 1 (CFSR1)
See
Channel Function Selection Register 2 (CFSR2)
See
Channel Function Selection Register 3 (CFSR3)
See
Host Sequence Register 0 (HSQR0)
See
Host Sequence Register 1 (HSQR1)
See
Host Service Request Register 0 (HSRR0)
See
Host Service Request Register 1 (HSRR1)
See
Channel Priority Register 0 (CPR0)
See
Channel Priority Register 1 (CPR1)
See
Channel Interrupt Status Register (CISR)
See
Link Register (LR)
Service Grant Latch Register (SGLR)
Decoded Channel Number Register (DCNR)
TPU Module Configuration Register 2 (TPUMCR2)
See
TPU Module Configuration 3 (TPUMCR3)
See
Internal Scan Data Register (ISDR)
Internal Scan Control Register (ISCR)
TIME PROCESSOR UNIT 3
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Table 8-6
Table 8-7
Table 8-8
Table 8-9
Table 8-10
Table 8-11
Table 8-11
Table 8-11
Table 8-11
Table 8-12
Table 8-12
Table 8-13
Table 8-13
Table 8-14
Table 8-14
Table 8-16
Table 8-17
Table 8-20
Rev. 25 June 03
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Register
MOTOROLA
8-9