MC68F375BGMZP33 Freescale Semiconductor, MC68F375BGMZP33 Datasheet - Page 365

• Manufacturer Part Number: MC68F375BGMZP33
• Description: IC MPU 32BIT 33MHZ 217-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68F375BGMZP33

• Processor Type: M683xx 32-Bit
• Speed: 33MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 217-PBGA
• Processor Series: M683xx
• Core: CPU32
• Data Bus Width: 32 bit
• Program Memory Type: Flash
• Program Memory Size: 256 KB
• Data Ram Size: 10 KB
• Interface Type: SPI, SCI, CAN
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 48
• Number Of Timers: 16
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Lead Free Status / Rohs Status: No

DPTMCR — DPT Module Configuration Register
9.4.1 DPTRAM Module Configuration Register (DPTMCR)
RESET:
MC68F375
REFERENCE MANUAL
STOP
MSB
Supv R/W
Test
Supv R/W
Supv Read Only
Supv Read Only
Supv Read Only
15
0
Table 9-1
offsets from the base address for the module. Refer to
DPTRAM control block in the MC68F375 address map. The DPTRAM array occupies
a 6-Kbyte block.
This register defines the basic configuration of the DPTRAM module. The DPTMCR
contains bits to configure the DPT RAM module for stop operation and for proper
access rights to the array. The register also contains the MISC control bits.
Access
R/W
14
13
shows the DPTRAM control and status registers. The addresses shown are
Reserved
0xYF F880
0xYF F882
0xYF F884
0xYF F886
0xYF F888
0xYF F88A
12
Address
Freescale Semiconductor, Inc.
11
For More Information On This Product,
Table 9-1 DPTRAM Register Map
DPT RAM nodule configuration register (DPTMCR)
See
Test configuration register (DPTTCR)
RAM base address register (DPTBAR)
See
Multiple Input Signature Register High (MISRH)
See
bit descriptions.
Multiple Input Signature Register Low (MISRL)
See
bit descriptions.
Multiple Input Signature Counter (MISCNT)
See
MISF
DUAL-PORT TPU RAM (DPTRAM)
10
0
9.4.4 MISR High (MISRH) and MISR Low (MISRL)
9.4.4 MISR High (MISRH) and MISR Low (MISRL)
Table 9-2
Table 9-3
9.4.5 MISC Counter (MISCNT)
Go to: www.freescale.com
MIS-
EN
9
0
Rev. 25 June 03
RASP
for bit descriptions.
for bit descriptions.
8
1
7
0
Register
6
0
for bit descriptions.
5
0
Figure 1-2
4
Reserved
0
3
0
for
for
2
0
to locate the
Last memory
Reset Value
0xYF F880
address
0x0100
0x0000
0x0001
0x0000
0x0000
MOTOROLA
1
0
LSB
9-3
0
0