MC68F375BGMZP33 Freescale Semiconductor, MC68F375BGMZP33 Datasheet - Page 43

• Manufacturer Part Number: MC68F375BGMZP33
• Description: IC MPU 32BIT 33MHZ 217-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68F375BGMZP33

• Processor Type: M683xx 32-Bit
• Speed: 33MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 217-PBGA
• Processor Series: M683xx
• Core: CPU32
• Data Bus Width: 32 bit
• Program Memory Type: Flash
• Program Memory Size: 256 KB
• Data Ram Size: 10 KB
• Interface Type: SPI, SCI, CAN
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 48
• Number Of Timers: 16
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Lead Free Status / Rohs Status: No

1.7 Address Map
1.7.1 Address Bus Decoding
MC68F375
REFERENCE MANUAL
Each MC68300/MC68HC16 derivative MCU has a 4-Kbyte block in the memory map
that is assigned to internal module registers. The MSB of the block address is user-
programmable via the MM (MODMAP) bit in the SCIMMCR register, see
Address Bus
to the individual modules, as shown in the MC68F375 address map in
These sub-blocks vary in size, depending on the register requirements for each mod-
ule. Positioning of registers within the module sub-blocks is dependent on the
individual modules and is specified in the respective module specifications. The RAM,
ROM, and CMFI array spaces are not shown with an assigned address because the
arrays are not enabled after reset. The arrays are enabled and the base address is set
by writing to the control blocks of each array.
Each module that is assigned a sub-block is responsible for responding to any
accesses within its assigned address range. Modules do not respond to any register
address within the module address space which is not implemented and not reserved.
These addresses are mapped outside the MC68F375. An access to a register at an
address which is reserved returns zeros, as do accesses to reserved bits within
registers.
If the SUPV bit in the module configuration register (MCR) within a module is set, any
user mode accesses to the module are mapped externally.
The internal MODMAP line is compared to internal address line A[23] while A[22:0] are
decoded by each module. If a module control block address is decoded, the access
will be internal. The value of A[22] down to the module block size is defined in
1-2
specified by Motorola. The value of MODMAP is specified by the MM control bit in the
SCIM2E module configuration register (SCIMMCR), see
for each module. These bits are fixed for this particular derivative device and are
Power (V
I/O Pad Power (V
Logic Power (V
DPTRAM (V
SCIM2E Clock (V
QADC64 Power (V
QADC64 Reference (V
Total
SRAM (V
Ground (V
CMFI (V
Decoding. Within this 4-Kbyte block are sub-blocks that are assigned
Table 1-1 MC68F375 Pin Usage (Continued)
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Freescale Semiconductor, Inc.
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DDA
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Rev. 25 June 03
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Total
14
3
16
1
1
1
2
2
2
42
Total Pins
199
4.2.2 Module
Port Pins
114
Mapping.
Figure
MOTOROLA
Figure
1.7.1
1-2.
1-9