MC68F375BGMZP33 Freescale Semiconductor, MC68F375BGMZP33 Datasheet - Page 490

• Manufacturer Part Number: MC68F375BGMZP33
• Description: IC MPU 32BIT 33MHZ 217-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68F375BGMZP33

• Processor Type: M683xx 32-Bit
• Speed: 33MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 217-PBGA
• Processor Series: M683xx
• Core: CPU32
• Data Bus Width: 32 bit
• Program Memory Type: Flash
• Program Memory Size: 256 KB
• Data Ram Size: 10 KB
• Interface Type: SPI, SCI, CAN
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 48
• Number Of Timers: 16
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Lead Free Status / Rohs Status: No

MC68F375
REFERENCE MANUAL
0xYF F000 –
0xYF F07F
0xYF F080
0xYF F082
0xYF F084
0xYF F086
0xYF F088
0xYF F08A
0xYF F090
0xYF F092
0xYF F094
0xYF F096
0xYF F098
0xYF F09A
0xYF F0A0
0xYF F0A2
0xYF F0A4
0xYF F0A6
0xYF F100 —
0xYF F10F
0xYF F110 —
0xYF F11F
0xYF F120 —
0xYF F12F
Address
Access
S/U
S/U
S/U
—
S
T
S
S
S
S
S
S
S
S
S
S
S
S
S
S
Table A-1 TouCAN (CAN 2.0B Controller)
TCNMCR
TTR
CANICR
CANCTRL0/
CANCTRL1
PRESDIV/
CANCTRL2
TIMER
RXGMASKHI
RXGMASKLO
RX14MASKHI
RX14MASKLO
RX15MASKHI
RX15MASKLO
ESTAT
IMASK
IFLAG
RXECTR/
TXECTR
MBUFF0
MBUFF1
MBUFF2
Freescale Semiconductor, Inc.
For More Information On This Product,
Symbol
—
INTERNAL MEMORY MAP
Go to: www.freescale.com
Reserved
TouCAN Module Configuration Register.
See
TouCAN Test Register
TouCAN Interrupt Configuration Register.
See
TouCAN Control Register 0/
TouCAN Control Register 1.
See
descriptions.
TouCAN Control and Prescaler Divider Register/
TouCAN Control Register 2.
See
descriptions.
TouCAN Free-Running Timer Register.
See
TouCAN Receive Global Mask High.
See
TouCAN Receive Global Mask Low.
See
TouCAN Receive Buffer 14 Mask High.
See
for bit descriptions.
TouCAN Receive Buffer 14 Mask Low.
See
for bit descriptions.
TouCAN Receive Buffer 15 Mask High.
See
ters
TouCAN Receive Buffer 15 Mask Low.
See
ters
TouCAN Error and Status Register.
See
TouCAN Interrupt Masks.
See
TouCAN Interrupt Flags.
See
TouCAN Receive Error Counter/
TouCAN Transmit Error Counter.
See
TouCAN Message Buffer 0.
See
er definitions.
TouCAN Message Buffer 1.
See
er definitions.
TouCAN Message Buffer 2.
See
er definitions.
Rev. 25 June 03
Table 7-13
Table 7-17
Table 7-19
Table 7-20
Table 7-20
7.8.9 Receive Buffer 14 Mask Registers
7.8.9 Receive Buffer 14 Mask Registers
7.8.10 Receive Buffer 15 Mask Regis-
7.8.10 Receive Buffer 15 Mask Regis-
Table 7-21
Table 7-24
Table 7-25
Table 7-26
Figure 7-3
Figure 7-3
Figure 7-3
Table 7-11
Table 7-12
for bit descriptions.
for bit descriptions.
and
and
and
for bit descriptions.
for bit descriptions.
for bit descriptions.
for bit descriptions.
for bit descriptions.
for bit descriptions.
for bit descriptions.
and
and
for bit descriptions.
for bit descriptions.
Register
Figure 7-4
Figure 7-4
Figure 7-4
Table 7-16
Table 7-18
for message buff-
for message buff-
for message buff-
for bit
for bit
Size
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
—
—
—
—
MOTOROLA
Reset
—
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
U
U
U
A-2