MC68F375BGMZP33 Freescale Semiconductor, MC68F375BGMZP33 Datasheet - Page 65

• Manufacturer Part Number: MC68F375BGMZP33
• Description: IC MPU 32BIT 33MHZ 217-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68F375BGMZP33

• Processor Type: M683xx 32-Bit
• Speed: 33MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 217-PBGA
• Processor Series: M683xx
• Core: CPU32
• Data Bus Width: 32 bit
• Program Memory Type: Flash
• Program Memory Size: 256 KB
• Data Ram Size: 10 KB
• Interface Type: SPI, SCI, CAN
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 48
• Number Of Timers: 16
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Lead Free Status / Rohs Status: No

MC68F375
REFERENCE MANUAL
ANDI to SR1
ANDI to CCR
Instruction
ADDQ
BCHG
BGND
ABCD
ADDA
ADDX
BCLR
CHK2
BKPT
BSET
BTST
ADDI
ANDI
ADD
AND
CHK
ASR
BRA
BSR
CLR
ASL
Bcc
1
# <data>, SR
# <data>, Dn
# <data>, Dn
(An),
(An),
# <data>,
# <data>,
# <data>,
# <data>,
# <data>,
# <data>,
# <data>,
Operand
Dn, <ea>
<ea>, Dn
<ea>, An
<ea>, Dn
Dn, <ea>
Dn, <ea>
Dn, <ea>
Dn, <ea>
Dn, <ea>
<ea>, Dn
<ea>, Rn
#<data>,
# <data>
Syntax
Dn, Dn
Dn, Dn
Dn, Dn
Dn, Dn
<ea>
<ea>
<ea>
<ea>
<ea>
<ea>
<ea>
<ea>
<ea>
<ea>
CCR
label
none
label
label
(An)
(An)
Freescale Semiconductor, Inc.
For More Information On This Product,
Table 3-2 Instruction Set Summary
Operand
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
8, 16, 32
16, 32
16, 32
8, 32
8, 32
8, 32
8, 32
none
none
8, 32
8, 32
8, 32
8, 32
Size
16
16
16
8
8
8
CENTRAL PROCESSOR UNIT
Go to: www.freescale.com
Source
Source
Source
Immediate data
Immediate data
Source
Source Destination
Data Destination
Source CCR
Source SR
If condition true, then PC
0
If background mode enabled, then enter background mode, else for-
mat/vector
PC
If breakpoint cycle acknowledged, then execute
returned operation word, else trap as illegal instruction
PC
1
SP
If Dn < 0 or Dn > (ea), then CHK exception
If Rn < lower bound or Rn > upper bound, then
CHK exception
0
Rev. 25 June 03
bit number of destination
bit number of destination
bit number of destination
bit number of destination
bit of destination
bit of destination
Destination
d
4
10
(SSP); SR
Destination
Destination
Destination
SP; PC
PC
Destination
X/C
(SSP);
SR
CCR
Destination
Destination
(SP); PC
Destination
10
X
Destination
(SSP); (vector)
Destination
Destination
d
X
Description
Destination
Z
Z;
PC
Z
Destination
Z;
d
Destination
Destination
bit of destination
PC
PC
X/C
0
MOTOROLA
3-11