MC68F375BGMZP33 Freescale Semiconductor, MC68F375BGMZP33 Datasheet - Page 566

• Manufacturer Part Number: MC68F375BGMZP33
• Description: IC MPU 32BIT 33MHZ 217-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68F375BGMZP33

• Processor Type: M683xx 32-Bit
• Speed: 33MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 217-PBGA
• Processor Series: M683xx
• Core: CPU32
• Data Bus Width: 32 bit
• Program Memory Type: Flash
• Program Memory Size: 256 KB
• Data Ram Size: 10 KB
• Interface Type: SPI, SCI, CAN
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 48
• Number Of Timers: 16
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Lead Free Status / Rohs Status: No

MC68F375
REFERENCE MANUAL
Num
13A
NOTES:
14
15
16
1. Input-Only Pins:
Output-Only Pins:
Input/Output Pins:
Pin groups do not include QADC64 pins. See
2. Use of an active pulldown device is recommended during reset to select operating mode.
3. Total operating current is the sum of the appropriate I
4. Current measured at 24 MHz system clock frequency, all modules active.
5. Add current if CMFI is being programed or erased.
6. The SRAM module will not switch into standby mode as long as V
7. The DPTRAM module will not switch into standby mode as long as V
8. When V
9. Power dissipation measured at 24 MHz system clock frequency, all modules active, not in TPU emulation mode, not program-
10. This parameter is periodically sampled rather than 100% tested.
11. HALT and RESET are open drain and do not apply for V
12. Design information only, not tested.
volts. The SRAM array cannot be accessed while the module is in standby mode.
volts. The DPTRAM array cannot be accessed while the module is in standby mode.
V
the V
ming or erasing the CMFI. Add for TPU emulation and/or CMFI program/erase operation. Power dissipation can be calculated
using the following expression:
DPTRAM Current
Power Dissipation
Input Capacitance
Load Capacitance
DD
Group 1:
Group 2:
Group 3:
Group 4:
Group 8:
Group 5:
Group 6:
Group 7:
pins, which causes standby current to increase toward the maximum transient condition specification. System noise on
All Input-only pins
All I/O pins
Groups 4 and 5 I/O pins
Group 3 Output-Only and Groups 6 and 7 I/O pins
DD
BKPT /DSCLK, TSC, CTM2C , BERR/SCEN , T2CLK
Port QS - PQS8/RXD1, PQS10/RXD2
Other — XFC, EXTAL, ANX[15:0], CNRX, EPEB0
Port CT — CPWM[8:5]
Other — CNTX
Port C — ADDR23/CS10/ECLK, ADDR[22:19]/CS[9:6]/PC[6:3], FC2/CS5/PC2, FC1/PC1, FC0/CS3/PC0
Other — IPIPE/DS0, CSBOOT, BG/CSM, CLKOUT, FREEZE/QOUT , ADDR[2:0], R/ W
Other — XTAL
Port A — PA[7:0]/ADDR[18:11]
Port B — PB[7:0]/ADDR[10:3]
Port E — PE[7:6]/SIZ[1:0], PE5/ AS , PE4/ DS , PE[1:0]/ DSACK[1:0], PE[2]
Port F — PF[7:5]/ IRQ[7:5] , PF0/FASTREF, PF[4:1]
Port G — PG[7:0]/DATA[15:8]
Port H — PH[7:0]/DATA[7:0]
Other — HALT, RESET, BGACK / CSE, BR / CS0 , IFETCH/DSI
Port CT — CTD[10:9]/[4:3], CTS[20A/B:18A/B:16A/B14A/B]
Port TP — TP[15:0]
Port QS — PQS7/TXD1, PQS9/TXD2, PQS[6:4]/PCS[3:1], PQS3/PCS0/SS, PQS2/SCK, PQS1/MOSI, PQS0/MISO
DD
P
and V
D
is transitioning during power-up or power down sequence, and V
= Maximum V
STBY
3 , 7 , 8
(V DDH = 5.0 Vdc
9
1 , 10
1
pins can contribute to this condition.
Characteristic
Table E-3 DC Characteristics (Continued)
DDH
Freescale Semiconductor, Inc.
(I
For More Information On This Product,
DDH
+ I
ELECTRICAL CHARACTERISTICS
DDA
5%, V DDL = 3.3 Vdc
Go to: www.freescale.com
) + Maximum V
Table E-10
Rev. 25 June 03
DDH
through
, I
OH5
DDL
DDL
spec.
(I
10%, V SS = 0 Vdc, T A = T L to T H )
, I
DDL
Table E-13
Symbol
I
DDSYN
DPTRAM
SB
P
C
+ I
—
does not exceed V
SB
D
L
DDSYN
, I
does not exceed V
DDA
SB
for information concerning the QADC64.
, I
+I
is applied, current flows between the V
DPTRAM
DPTRAM
Min
—
—
—
—
—
—
, and I
DD
+ I
SB
DD
by more than 0.5
)
SB
by more than 0.5
values.
Max
1.07
20
10
20
70
50
MOTOROLA
STBY
Unit
mA
pF
pF
W
E-4
and