MC68F375BGMZP33 Freescale Semiconductor, MC68F375BGMZP33 Datasheet - Page 200

• Manufacturer Part Number: MC68F375BGMZP33
• Description: IC MPU 32BIT 33MHZ 217-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68F375BGMZP33

• Processor Type: M683xx 32-Bit
• Speed: 33MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 217-PBGA
• Processor Series: M683xx
• Core: CPU32
• Data Bus Width: 32 bit
• Program Memory Type: Flash
• Program Memory Size: 256 KB
• Data Ram Size: 10 KB
• Interface Type: SPI, SCI, CAN
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 48
• Number Of Timers: 16
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Lead Free Status / Rohs Status: No

MC68F375
REFERENCE MANUAL
The purpose of external gated continuous-scan mode is to continuously collect digi-
tized samples while the gate is open and to have the most recent samples available.
To ensure consistent sample times in waveform digitizing, for example, the program-
mer must ensure that all CCW’s have identical sample time settings in IST.
It is up to the programmer to ensure that the queue is large enough so that a maximum
gate open time will not reach an end-of-queue. However it is useful to take advantage
of a smaller queue in the manner described below.
In the event that the queue completes before the gate closes, a completion flag will be
set and the queue will roll over to the beginning and continue conversions until the gate
closes. If the gate remains open and the queue completes a second time, the trigger
overrun flag will be set and the queue will roll over again. The queue will continue to
execute until the gate closes or the mode is disabled.
If the gate closes before queue 1 completes execution, the current CCW completes
and execution of queue 1 stops and QADC64 sets the PF1 bit to indicate an incom-
plete queue. Software can read the CWPQ1 to determine the last valid conversion in
the queue. In this mode, if the gate opens again, execution of queue 1 begins again.
The start of queue 1 is always the first CCW in the CCW table.
Interval Timer Continuous-Scan Mode. The QADC64 includes a dedicated periodic/
interval timer for initiating a scan sequence on queue 1 and/or queue 2. Software
selects a programmable timer interval ranging from 128 to 128K times the QCLK
period in binary multiples. The QCLK period is prescaled down from the intermodule
bus (IMB) MCU clock.
When a periodic timer continuous-scan mode is selected for queue 1 and/or queue 2,
the timer begins counting. After the programmed interval elapses, the timer generated
trigger event starts the appropriate queue. Meanwhile, the QADC64 automatically per-
forms the conversions in the queue until an end-of-queue condition or a pause is
encountered. When a pause occurs, the QADC64 waits for the periodic interval to
expire again, then continues with the queue. Once end-of-queue has been detected,
the next trigger event causes queue execution to begin again with the first CCW in the
queue.
The periodic timer generates a trigger event whenever the time interval elapses. The
trigger event may cause the queue execution to continue following a pause or queue
completion, or may be considered a trigger overrun. As with all continuous-scan queue
operating modes, software action is not needed between trigger events.
Software enables the completion interrupt when using the periodic timer continuous-
scan mode. When the interrupt occurs, the software knows that the periodically col-
lected analog results have just been taken. The software can use the periodic interrupt
to obtain non-analog inputs as well, such as contact closures, as part of a periodic look
at all inputs.
QUEUED ANALOG-TO-DIGITAL CONVERTER MODULE-64
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
Rev. 25 June 03
MOTOROLA
5-24