MC68F375BGMZP33 Freescale Semiconductor, MC68F375BGMZP33 Datasheet - Page 320

• Manufacturer Part Number: MC68F375BGMZP33
• Description: IC MPU 32BIT 33MHZ 217-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68F375BGMZP33

• Processor Type: M683xx 32-Bit
• Speed: 33MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 217-PBGA
• Processor Series: M683xx
• Core: CPU32
• Data Bus Width: 32 bit
• Program Memory Type: Flash
• Program Memory Size: 256 KB
• Data Ram Size: 10 KB
• Interface Type: SPI, SCI, CAN
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 48
• Number Of Timers: 16
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Lead Free Status / Rohs Status: No

MC68F375
REFERENCE MANUAL
Once these steps are performed, the message buffer functions as an active receive
buffer and participates in the internal matching process, which takes place every time
the TouCAN receives an error-free frame. In this process, all active receive buffers
compare their ID value to the newly received one. If a match is detected, the following
actions occur:
The user should read a received frame from its message buffer in the following order:
If the free running timer is not read, that message buffer remains locked until the read
process starts for another message buffer. Only a single message buffer is locked at
a time. When a received message is read, the only mandatory read operation is that
of the control/status word. This ensures data coherency.
If the BUSY bit is set in the message buffer code, the CPU should defer accessing that
buffer until this bit is negated. Refer to
Because the received identifier field is always stored in the matching receive message
buffer, the contents of the identifier field in a receive message buffer may change if
one or more of the ID bits are masked.
3. Write the control/status word to mark the receive message buffer as active and
1. The frame is transferred to the first (lowest entry) matching receive message
2. The value of the free-running timer (captured at the beginning of the identifier
3. The ID field, data field, and RX length field are stored.
4. The code field is updated.
5. The status flag is set in the IFLAG register.
1. Control/status word (mandatory, as it activates the internal lock for this buffer)
2. ID (optional, since it is needed only if a mask was used)
3. Data field word(s)
4. Free-running timer (optional, as it releases the internal lock)
empty.
buffer.
field on the CAN bus) is written into the time stamp field in the message buffer.
Steps 1 and 3 are mandatory for data coherency.
The user should check the status of a message buffer by reading the
status flag in the IFLAG register and not by reading the control/status
word code field for that message buffer. This prevents the buffer from
being locked inadvertently.
Freescale Semiconductor, Inc.
For More Information On This Product,
CAN 2.0B CONTROLLER MODULE
Go to: www.freescale.com
Rev. 25 June 03
Table
NOTE
NOTE
7-2.
MOTOROLA
7-14