MC68F375BGMZP33 Freescale Semiconductor, MC68F375BGMZP33 Datasheet - Page 222

• Manufacturer Part Number: MC68F375BGMZP33
• Description: IC MPU 32BIT 33MHZ 217-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68F375BGMZP33

• Processor Type: M683xx 32-Bit
• Speed: 33MHz
• Voltage: 5V
• Mounting Type: Surface Mount
• Package / Case: 217-PBGA
• Processor Series: M683xx
• Core: CPU32
• Data Bus Width: 32 bit
• Program Memory Type: Flash
• Program Memory Size: 256 KB
• Data Ram Size: 10 KB
• Interface Type: SPI, SCI, CAN
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 48
• Number Of Timers: 16
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Lead Free Status / Rohs Status: No

MC68F375
REFERENCE MANUAL
BQ2
00
63
Figure 5-12
To prepare the QADC64 for a scan sequence, the software writes to the CCW table to
specify the desired channel conversions. The software also establishes the criteria for
initiating the queue execution by programming the queue operating mode. The queue
operating mode determines what type of trigger event causes queue execution to
begin. “Trigger event” refers to any of the ways to cause the QADC64 to begin execut-
ing the CCWs in a queue or subqueue. An external trigger is only one of the possible
trigger events.
A scan sequence may be initiated by the following:
LSB
6
P
CONVERSION COMMAND WORD
CHAN = CHANNEL NUMBER AND END-OF-QUEUE CODE
BYP = BYPASS BUFFER AMPLIFIER
• A software command
IST = INPUT SAMPLE TIME
BYP
P = PAUSE AFTER CONVERSION UNTIL NEXT TRIGGER
7
END-OF-Queue 1
END-OF-Queue 2
BEGIN Queue 1
BEGIN Queue 2
(CCW) TABLE
10-BIT CONVERSION COMMAND
8
IST
9
illustrates the operation of the queue structure.
WORD FORMAT
Figure 5-12 QADC64 Conversion Queue Operation
QUEUED ANALOG-TO-DIGITAL CONVERTER MODULE-64
10
11
Freescale Semiconductor, Inc.
CHAN
12
For More Information On This Product,
13
SAMPLE, HOLD, AND
CHANNEL SELECT,
A/D CONVERSION
14
Go to: www.freescale.com
15
MSB
Rev. 25 June 03
S = SIGN BIT
MSB
MSB
MSB
0
0
0
0
S
1
1
1
0
RIGHT JUSTIFIED, UNSIGNED RESULT
LEFT JUSTIFIED, UNSIGNED RESULT
2
2
0
2
LEFT JUSTIFIED, SIGNED RESULT
10-BIT RESULT, READABLE IN
3
RESULT
3
3
0
RESULT
THREE 16-BIT FORMATS
4
4
RESULT WORD TABLE
4
0
5
5
5
0
6
6
6
7
7
7
8
8
8
9
9
9
RESULT
0
0
10
10
10
0
0
11 12 13 14
11 12 13 14
11 12 13 14
0
0
MOTOROLA
0
0
0
0
QADC64 CQ
LSB
LSB
LSB
0
0
15
15
15
5-46
00
63