MC68F375BGMZP33 Freescale Semiconductor, MC68F375BGMZP33 Datasheet - Page 35

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MC68F375BGMZP33

Manufacturer Part Number
MC68F375BGMZP33
Description
IC MPU 32BIT 33MHZ 217-PBGA
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC68F375BGMZP33

Processor Type
M683xx 32-Bit
Speed
33MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
217-PBGA
Processor Series
M683xx
Core
CPU32
Data Bus Width
32 bit
Program Memory Type
Flash
Program Memory Size
256 KB
Data Ram Size
10 KB
Interface Type
SPI, SCI, CAN
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
48
Number Of Timers
16
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-
Lead Free Status / Rohs Status
No

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68F375BGMZP33
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
1.1 Introduction
1.2 MC68F375 Feature List
MC68F375
REFERENCE MANUAL
The MC68F375 is a member of the MC68300/68HC16 family of modular microcontrol-
lers. This family includes a series of modules from which numerous microcontrollers
(MCU’s) are derived. These modules are connected on-chip via the intermodule bus
(IMB). This section includes a list of pins that are available to each module on the chip,
see
The major features of the MC68F375 are listed below. A block diagram of the device
is shown in
• Modular architecture.
• 32-bit 68000 family CPU with upward object code compatibility (CPU32):
• Single chip integration module (SCIM2E):
• 10-bit queued analog-to-digital converter with AMUX (QADC64):
• Queued serial multi-channel communication module with three serial I/O sub-
Table
systems (QSMCM):
— Virtual memory implementation.
— Loop mode for instruction execution.
— Improved exception handling for controller applications.
— Table lookup and interpolate instruction.
— External bus support.
— Parallel ports option on address and data bus in single chip modes and par-
— Nine programmable chip select outputs.
— Two special emulation-specific chip select outputs.
— System protection logic.
— System clock based on slow (~32 KHz) or Fast (~4 MHz) crystal reference or
— Periodic interrupt timer, watchdog timer, clock monitor and bus monitor.
— Up to 16 channels on the QADC64 (25 total including the 16 AMUX Channels).
— 4 automatic channel selection and conversion modes.
— 2 channel scan queues of variable length.
— 64 result registers and 3 result alignment formats.
— Programmable input sample time.
— Analog multiplexer capable of multiplexing 16 analog channels.
— 2 enhanced SCI (UART): modulus baud rate generator, parity. One SCI has
— Queued SPI: 160-byte RAM, up to 32 automatic transfers, continuous cycling,
tially expanded modes.
external clock operation (2X).
16 level Rx and Tx queues.
8-to-16 bits per transfer, LSB/MSB first.
1-1.
Figure
1-1.
Freescale Semiconductor, Inc.
For More Information On This Product,
OVERVIEW DESCRIPTION
OVERVIEW DESCRIPTION
Go to: www.freescale.com
Rev. 25 June 03
SECTION 1
MOTOROLA
1-1

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